comparison lib/CodeGen/SplitKit.cpp @ 95:afa8332a0e37 LLVM3.8

LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents 60c9769439b8
children 1172e4bd9c6f
comparison
equal deleted inserted replaced
84:f3e34b893a5f 95:afa8332a0e37
54 DidRepairRange = false; 54 DidRepairRange = false;
55 } 55 }
56 56
57 SlotIndex SplitAnalysis::computeLastSplitPoint(unsigned Num) { 57 SlotIndex SplitAnalysis::computeLastSplitPoint(unsigned Num) {
58 const MachineBasicBlock *MBB = MF.getBlockNumbered(Num); 58 const MachineBasicBlock *MBB = MF.getBlockNumbered(Num);
59 // FIXME: Handle multiple EH pad successors.
59 const MachineBasicBlock *LPad = MBB->getLandingPadSuccessor(); 60 const MachineBasicBlock *LPad = MBB->getLandingPadSuccessor();
60 std::pair<SlotIndex, SlotIndex> &LSP = LastSplitPoint[Num]; 61 std::pair<SlotIndex, SlotIndex> &LSP = LastSplitPoint[Num];
61 SlotIndex MBBEnd = LIS.getMBBEndIdx(MBB); 62 SlotIndex MBBEnd = LIS.getMBBEndIdx(MBB);
62 63
63 // Compute split points on the first call. The pair is independent of the 64 // Compute split points on the first call. The pair is independent of the
174 SmallVectorImpl<SlotIndex>::const_iterator UseI, UseE; 175 SmallVectorImpl<SlotIndex>::const_iterator UseI, UseE;
175 UseI = UseSlots.begin(); 176 UseI = UseSlots.begin();
176 UseE = UseSlots.end(); 177 UseE = UseSlots.end();
177 178
178 // Loop over basic blocks where CurLI is live. 179 // Loop over basic blocks where CurLI is live.
179 MachineFunction::iterator MFI = LIS.getMBBFromIndex(LVI->start); 180 MachineFunction::iterator MFI =
181 LIS.getMBBFromIndex(LVI->start)->getIterator();
180 for (;;) { 182 for (;;) {
181 BlockInfo BI; 183 BlockInfo BI;
182 BI.MBB = MFI; 184 BI.MBB = &*MFI;
183 SlotIndex Start, Stop; 185 SlotIndex Start, Stop;
184 std::tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB); 186 std::tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB);
185 187
186 // If the block contains no uses, the range must be live through. At one 188 // If the block contains no uses, the range must be live through. At one
187 // point, RegisterCoalescer could create dangling ranges that ended 189 // point, RegisterCoalescer could create dangling ranges that ended
257 259
258 // Pick the next basic block. 260 // Pick the next basic block.
259 if (LVI->start < Stop) 261 if (LVI->start < Stop)
260 ++MFI; 262 ++MFI;
261 else 263 else
262 MFI = LIS.getMBBFromIndex(LVI->start); 264 MFI = LIS.getMBBFromIndex(LVI->start)->getIterator();
263 } 265 }
264 266
265 assert(getNumLiveBlocks() == countLiveBlocks(CurLI) && "Bad block count"); 267 assert(getNumLiveBlocks() == countLiveBlocks(CurLI) && "Bad block count");
266 return true; 268 return true;
267 } 269 }
273 LiveInterval::iterator LVI = li->begin(); 275 LiveInterval::iterator LVI = li->begin();
274 LiveInterval::iterator LVE = li->end(); 276 LiveInterval::iterator LVE = li->end();
275 unsigned Count = 0; 277 unsigned Count = 0;
276 278
277 // Loop over basic blocks where li is live. 279 // Loop over basic blocks where li is live.
278 MachineFunction::const_iterator MFI = LIS.getMBBFromIndex(LVI->start); 280 MachineFunction::const_iterator MFI =
279 SlotIndex Stop = LIS.getMBBEndIdx(MFI); 281 LIS.getMBBFromIndex(LVI->start)->getIterator();
282 SlotIndex Stop = LIS.getMBBEndIdx(&*MFI);
280 for (;;) { 283 for (;;) {
281 ++Count; 284 ++Count;
282 LVI = li->advanceTo(LVI, Stop); 285 LVI = li->advanceTo(LVI, Stop);
283 if (LVI == LVE) 286 if (LVI == LVE)
284 return Count; 287 return Count;
285 do { 288 do {
286 ++MFI; 289 ++MFI;
287 Stop = LIS.getMBBEndIdx(MFI); 290 Stop = LIS.getMBBEndIdx(&*MFI);
288 } while (Stop <= LVI->start); 291 } while (Stop <= LVI->start);
289 } 292 }
290 } 293 }
291 294
292 bool SplitAnalysis::isOriginalEndpoint(SlotIndex Idx) const { 295 bool SplitAnalysis::isOriginalEndpoint(SlotIndex Idx) const {
862 LiveRangeCalc &LRC = getLRCalc(RegIdx); 865 LiveRangeCalc &LRC = getLRCalc(RegIdx);
863 866
864 // This value has multiple defs in RegIdx, but it wasn't rematerialized, 867 // This value has multiple defs in RegIdx, but it wasn't rematerialized,
865 // so the live range is accurate. Add live-in blocks in [Start;End) to the 868 // so the live range is accurate. Add live-in blocks in [Start;End) to the
866 // LiveInBlocks. 869 // LiveInBlocks.
867 MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start); 870 MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start)->getIterator();
868 SlotIndex BlockStart, BlockEnd; 871 SlotIndex BlockStart, BlockEnd;
869 std::tie(BlockStart, BlockEnd) = LIS.getSlotIndexes()->getMBBRange(MBB); 872 std::tie(BlockStart, BlockEnd) = LIS.getSlotIndexes()->getMBBRange(&*MBB);
870 873
871 // The first block may be live-in, or it may have its own def. 874 // The first block may be live-in, or it may have its own def.
872 if (Start != BlockStart) { 875 if (Start != BlockStart) {
873 VNInfo *VNI = LR.extendInBlock(BlockStart, std::min(BlockEnd, End)); 876 VNInfo *VNI = LR.extendInBlock(BlockStart, std::min(BlockEnd, End));
874 assert(VNI && "Missing def for complex mapped value"); 877 assert(VNI && "Missing def for complex mapped value");
875 DEBUG(dbgs() << ':' << VNI->id << "*BB#" << MBB->getNumber()); 878 DEBUG(dbgs() << ':' << VNI->id << "*BB#" << MBB->getNumber());
876 // MBB has its own def. Is it also live-out? 879 // MBB has its own def. Is it also live-out?
877 if (BlockEnd <= End) 880 if (BlockEnd <= End)
878 LRC.setLiveOutValue(MBB, VNI); 881 LRC.setLiveOutValue(&*MBB, VNI);
879 882
880 // Skip to the next block for live-in. 883 // Skip to the next block for live-in.
881 ++MBB; 884 ++MBB;
882 BlockStart = BlockEnd; 885 BlockStart = BlockEnd;
883 } 886 }
884 887
885 // Handle the live-in blocks covered by [Start;End). 888 // Handle the live-in blocks covered by [Start;End).
886 assert(Start <= BlockStart && "Expected live-in block"); 889 assert(Start <= BlockStart && "Expected live-in block");
887 while (BlockStart < End) { 890 while (BlockStart < End) {
888 DEBUG(dbgs() << ">BB#" << MBB->getNumber()); 891 DEBUG(dbgs() << ">BB#" << MBB->getNumber());
889 BlockEnd = LIS.getMBBEndIdx(MBB); 892 BlockEnd = LIS.getMBBEndIdx(&*MBB);
890 if (BlockStart == ParentVNI->def) { 893 if (BlockStart == ParentVNI->def) {
891 // This block has the def of a parent PHI, so it isn't live-in. 894 // This block has the def of a parent PHI, so it isn't live-in.
892 assert(ParentVNI->isPHIDef() && "Non-phi defined at block start?"); 895 assert(ParentVNI->isPHIDef() && "Non-phi defined at block start?");
893 VNInfo *VNI = LR.extendInBlock(BlockStart, std::min(BlockEnd, End)); 896 VNInfo *VNI = LR.extendInBlock(BlockStart, std::min(BlockEnd, End));
894 assert(VNI && "Missing def for complex mapped parent PHI"); 897 assert(VNI && "Missing def for complex mapped parent PHI");
895 if (End >= BlockEnd) 898 if (End >= BlockEnd)
896 LRC.setLiveOutValue(MBB, VNI); // Live-out as well. 899 LRC.setLiveOutValue(&*MBB, VNI); // Live-out as well.
897 } else { 900 } else {
898 // This block needs a live-in value. The last block covered may not 901 // This block needs a live-in value. The last block covered may not
899 // be live-out. 902 // be live-out.
900 if (End < BlockEnd) 903 if (End < BlockEnd)
901 LRC.addLiveInBlock(LR, MDT[MBB], End); 904 LRC.addLiveInBlock(LR, MDT[&*MBB], End);
902 else { 905 else {
903 // Live-through, and we don't know the value. 906 // Live-through, and we don't know the value.
904 LRC.addLiveInBlock(LR, MDT[MBB]); 907 LRC.addLiveInBlock(LR, MDT[&*MBB]);
905 LRC.setLiveOutValue(MBB, nullptr); 908 LRC.setLiveOutValue(&*MBB, nullptr);
906 } 909 }
907 } 910 }
908 BlockStart = BlockEnd; 911 BlockStart = BlockEnd;
909 ++MBB; 912 ++MBB;
910 } 913 }
1079 1082
1080 // Now check if any registers were separated into multiple components. 1083 // Now check if any registers were separated into multiple components.
1081 ConnectedVNInfoEqClasses ConEQ(LIS); 1084 ConnectedVNInfoEqClasses ConEQ(LIS);
1082 for (unsigned i = 0, e = Edit->size(); i != e; ++i) { 1085 for (unsigned i = 0, e = Edit->size(); i != e; ++i) {
1083 // Don't use iterators, they are invalidated by create() below. 1086 // Don't use iterators, they are invalidated by create() below.
1084 LiveInterval *li = &LIS.getInterval(Edit->get(i)); 1087 unsigned VReg = Edit->get(i);
1085 unsigned NumComp = ConEQ.Classify(li); 1088 LiveInterval &LI = LIS.getInterval(VReg);
1086 if (NumComp <= 1) 1089 SmallVector<LiveInterval*, 8> SplitLIs;
1087 continue; 1090 LIS.splitSeparateComponents(LI, SplitLIs);
1088 DEBUG(dbgs() << " " << NumComp << " components: " << *li << '\n'); 1091 unsigned Original = VRM.getOriginal(VReg);
1089 SmallVector<LiveInterval*, 8> dups; 1092 for (LiveInterval *SplitLI : SplitLIs)
1090 dups.push_back(li); 1093 VRM.setIsSplitFromReg(SplitLI->reg, Original);
1091 for (unsigned j = 1; j != NumComp; ++j) 1094
1092 dups.push_back(&Edit->createEmptyInterval());
1093 ConEQ.Distribute(&dups[0], MRI);
1094 // The new intervals all map back to i. 1095 // The new intervals all map back to i.
1095 if (LRMap) 1096 if (LRMap)
1096 LRMap->resize(Edit->size(), i); 1097 LRMap->resize(Edit->size(), i);
1097 } 1098 }
1098 1099