Mercurial > hg > CbC > CbC_llvm

comparison test/CodeGen/AMDGPU/uint_to_fp.f64.ll @ 95:afa8332a0e37 LLVM3.8

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents
children 1172e4bd9c6f
comparison
equal deleted inserted replaced
84:f3e34b893a5f 95:afa8332a0e37
1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
2
3 declare i32 @llvm.r600.read.tidig.x() nounwind readnone
4
5 ; SI-LABEL: {{^}}v_uint_to_fp_i64_to_f64
6 ; SI: buffer_load_dwordx2 v{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]{{\]}}
7 ; SI-DAG: v_cvt_f64_u32_e32 [[HI_CONV:v\[[0-9]+:[0-9]+\]]], v[[HI]]
8 ; SI-DAG: v_cvt_f64_u32_e32 [[LO_CONV:v\[[0-9]+:[0-9]+\]]], v[[LO]]
9 ; SI-DAG: v_ldexp_f64 [[LDEXP:v\[[0-9]+:[0-9]+\]]], [[HI_CONV]], 32
10 ; SI: v_add_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[LDEXP]], [[LO_CONV]]
11 ; SI: buffer_store_dwordx2 [[RESULT]]
12 define void @v_uint_to_fp_i64_to_f64(double addrspace(1)* %out, i64 addrspace(1)* %in) {
13 %tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone
14 %gep = getelementptr i64, i64 addrspace(1)* %in, i32 %tid
15 %val = load i64, i64 addrspace(1)* %gep, align 8
16 %result = uitofp i64 %val to double
17 store double %result, double addrspace(1)* %out
18 ret void
19 }
20
21 ; SI-LABEL: {{^}}s_uint_to_fp_i64_to_f64
22 define void @s_uint_to_fp_i64_to_f64(double addrspace(1)* %out, i64 %in) {
23 %cast = uitofp i64 %in to double
24 store double %cast, double addrspace(1)* %out, align 8
25 ret void
26 }
27
28 ; SI-LABEL: {{^}}s_uint_to_fp_v2i64_to_v2f64
29 define void @s_uint_to_fp_v2i64_to_v2f64(<2 x double> addrspace(1)* %out, <2 x i64> %in) {
30 %cast = uitofp <2 x i64> %in to <2 x double>
31 store <2 x double> %cast, <2 x double> addrspace(1)* %out, align 16
32 ret void
33 }
34
35 ; SI-LABEL: {{^}}s_uint_to_fp_v4i64_to_v4f64
36 define void @s_uint_to_fp_v4i64_to_v4f64(<4 x double> addrspace(1)* %out, <4 x i64> %in) {
37 %cast = uitofp <4 x i64> %in to <4 x double>
38 store <4 x double> %cast, <4 x double> addrspace(1)* %out, align 16
39 ret void
40 }
41
42 ; SI-LABEL: {{^}}s_uint_to_fp_i32_to_f64
43 ; SI: v_cvt_f64_u32_e32
44 ; SI: s_endpgm
45 define void @s_uint_to_fp_i32_to_f64(double addrspace(1)* %out, i32 %in) {
46 %cast = uitofp i32 %in to double
47 store double %cast, double addrspace(1)* %out, align 8
48 ret void
49 }
50
51 ; SI-LABEL: {{^}}s_uint_to_fp_v2i32_to_v2f64
52 ; SI: v_cvt_f64_u32_e32
53 ; SI: v_cvt_f64_u32_e32
54 ; SI: s_endpgm
55 define void @s_uint_to_fp_v2i32_to_v2f64(<2 x double> addrspace(1)* %out, <2 x i32> %in) {
56 %cast = uitofp <2 x i32> %in to <2 x double>
57 store <2 x double> %cast, <2 x double> addrspace(1)* %out, align 16
58 ret void
59 }
60
61 ; SI-LABEL: {{^}}s_uint_to_fp_v4i32_to_v4f64
62 ; SI: v_cvt_f64_u32_e32
63 ; SI: v_cvt_f64_u32_e32
64 ; SI: v_cvt_f64_u32_e32
65 ; SI: v_cvt_f64_u32_e32
66 ; SI: s_endpgm
67 define void @s_uint_to_fp_v4i32_to_v4f64(<4 x double> addrspace(1)* %out, <4 x i32> %in) {
68 %cast = uitofp <4 x i32> %in to <4 x double>
69 store <4 x double> %cast, <4 x double> addrspace(1)* %out, align 16
70 ret void
71 }
72
73 ; FIXME: select on 0, 0
74 ; SI-LABEL: {{^}}uint_to_fp_i1_to_f64:
75 ; SI: v_cmp_eq_i32_e64 vcc
76 ; We can't fold the SGPRs into v_cndmask_b32_e32, because it already
77 ; uses an SGPR (implicit vcc).
78 ; SI: v_cndmask_b32_e32 v{{[0-9]+}}, 0, v{{[0-9]+}}
79 ; SI: v_cndmask_b32_e64 v{{[0-9]+}}, 0, 0, vcc
80 ; SI: buffer_store_dwordx2
81 ; SI: s_endpgm
82 define void @uint_to_fp_i1_to_f64(double addrspace(1)* %out, i32 %in) {
83 %cmp = icmp eq i32 %in, 0
84 %fp = uitofp i1 %cmp to double
85 store double %fp, double addrspace(1)* %out, align 4
86 ret void
87 }
88
89 ; SI-LABEL: {{^}}uint_to_fp_i1_to_f64_load:
90 ; SI: v_cndmask_b32_e64 [[IRESULT:v[0-9]]], 0, 1
91 ; SI-NEXT: v_cvt_f64_u32_e32 [[RESULT:v\[[0-9]+:[0-9]\]]], [[IRESULT]]
92 ; SI: buffer_store_dwordx2 [[RESULT]]
93 ; SI: s_endpgm
94 define void @uint_to_fp_i1_to_f64_load(double addrspace(1)* %out, i1 %in) {
95 %fp = uitofp i1 %in to double
96 store double %fp, double addrspace(1)* %out, align 8
97 ret void
98 }