Mercurial > hg > CbC > CbC_llvm
comparison test/CodeGen/PowerPC/store-update.ll @ 95:afa8332a0e37 LLVM3.8
LLVM 3.8
author | Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> |
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date | Tue, 13 Oct 2015 17:48:58 +0900 |
parents | 95c75e76d11b |
children | 1172e4bd9c6f |
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84:f3e34b893a5f | 95:afa8332a0e37 |
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3 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" | 3 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" |
4 target triple = "powerpc64-unknown-linux-gnu" | 4 target triple = "powerpc64-unknown-linux-gnu" |
5 | 5 |
6 define i8* @test_stbu(i8* %base, i8 zeroext %val) nounwind { | 6 define i8* @test_stbu(i8* %base, i8 zeroext %val) nounwind { |
7 entry: | 7 entry: |
8 %arrayidx = getelementptr inbounds i8* %base, i64 16 | 8 %arrayidx = getelementptr inbounds i8, i8* %base, i64 16 |
9 store i8 %val, i8* %arrayidx, align 1 | 9 store i8 %val, i8* %arrayidx, align 1 |
10 ret i8* %arrayidx | 10 ret i8* %arrayidx |
11 } | 11 } |
12 ; CHECK: @test_stbu | 12 ; CHECK: @test_stbu |
13 ; CHECK: %entry | 13 ; CHECK: %entry |
14 ; CHECK-NEXT: stbu | 14 ; CHECK-NEXT: stbu |
15 ; CHECK-NEXT: blr | 15 ; CHECK-NEXT: blr |
16 | 16 |
17 define i8* @test_stbux(i8* %base, i8 zeroext %val, i64 %offset) nounwind { | 17 define i8* @test_stbux(i8* %base, i8 zeroext %val, i64 %offset) nounwind { |
18 entry: | 18 entry: |
19 %arrayidx = getelementptr inbounds i8* %base, i64 %offset | 19 %arrayidx = getelementptr inbounds i8, i8* %base, i64 %offset |
20 store i8 %val, i8* %arrayidx, align 1 | 20 store i8 %val, i8* %arrayidx, align 1 |
21 ret i8* %arrayidx | 21 ret i8* %arrayidx |
22 } | 22 } |
23 ; CHECK: @test_stbux | 23 ; CHECK: @test_stbux |
24 ; CHECK: %entry | 24 ; CHECK: %entry |
25 ; CHECK-NEXT: stbux | 25 ; CHECK-NEXT: stbux |
26 ; CHECK-NEXT: blr | 26 ; CHECK-NEXT: blr |
27 | 27 |
28 define i16* @test_sthu(i16* %base, i16 zeroext %val) nounwind { | 28 define i16* @test_sthu(i16* %base, i16 zeroext %val) nounwind { |
29 entry: | 29 entry: |
30 %arrayidx = getelementptr inbounds i16* %base, i64 16 | 30 %arrayidx = getelementptr inbounds i16, i16* %base, i64 16 |
31 store i16 %val, i16* %arrayidx, align 2 | 31 store i16 %val, i16* %arrayidx, align 2 |
32 ret i16* %arrayidx | 32 ret i16* %arrayidx |
33 } | 33 } |
34 ; CHECK: @test_sthu | 34 ; CHECK: @test_sthu |
35 ; CHECK: %entry | 35 ; CHECK: %entry |
36 ; CHECK-NEXT: sthu | 36 ; CHECK-NEXT: sthu |
37 ; CHECK-NEXT: blr | 37 ; CHECK-NEXT: blr |
38 | 38 |
39 define i16* @test_sthux(i16* %base, i16 zeroext %val, i64 %offset) nounwind { | 39 define i16* @test_sthux(i16* %base, i16 zeroext %val, i64 %offset) nounwind { |
40 entry: | 40 entry: |
41 %arrayidx = getelementptr inbounds i16* %base, i64 %offset | 41 %arrayidx = getelementptr inbounds i16, i16* %base, i64 %offset |
42 store i16 %val, i16* %arrayidx, align 2 | 42 store i16 %val, i16* %arrayidx, align 2 |
43 ret i16* %arrayidx | 43 ret i16* %arrayidx |
44 } | 44 } |
45 ; CHECK: @test_sthux | 45 ; CHECK: @test_sthux |
46 ; CHECK: %entry | 46 ; CHECK: %entry |
48 ; CHECK-NEXT: sthux | 48 ; CHECK-NEXT: sthux |
49 ; CHECK-NEXT: blr | 49 ; CHECK-NEXT: blr |
50 | 50 |
51 define i32* @test_stwu(i32* %base, i32 zeroext %val) nounwind { | 51 define i32* @test_stwu(i32* %base, i32 zeroext %val) nounwind { |
52 entry: | 52 entry: |
53 %arrayidx = getelementptr inbounds i32* %base, i64 16 | 53 %arrayidx = getelementptr inbounds i32, i32* %base, i64 16 |
54 store i32 %val, i32* %arrayidx, align 4 | 54 store i32 %val, i32* %arrayidx, align 4 |
55 ret i32* %arrayidx | 55 ret i32* %arrayidx |
56 } | 56 } |
57 ; CHECK: @test_stwu | 57 ; CHECK: @test_stwu |
58 ; CHECK: %entry | 58 ; CHECK: %entry |
59 ; CHECK-NEXT: stwu | 59 ; CHECK-NEXT: stwu |
60 ; CHECK-NEXT: blr | 60 ; CHECK-NEXT: blr |
61 | 61 |
62 define i32* @test_stwux(i32* %base, i32 zeroext %val, i64 %offset) nounwind { | 62 define i32* @test_stwux(i32* %base, i32 zeroext %val, i64 %offset) nounwind { |
63 entry: | 63 entry: |
64 %arrayidx = getelementptr inbounds i32* %base, i64 %offset | 64 %arrayidx = getelementptr inbounds i32, i32* %base, i64 %offset |
65 store i32 %val, i32* %arrayidx, align 4 | 65 store i32 %val, i32* %arrayidx, align 4 |
66 ret i32* %arrayidx | 66 ret i32* %arrayidx |
67 } | 67 } |
68 ; CHECK: @test_stwux | 68 ; CHECK: @test_stwux |
69 ; CHECK: %entry | 69 ; CHECK: %entry |
72 ; CHECK-NEXT: blr | 72 ; CHECK-NEXT: blr |
73 | 73 |
74 define i8* @test_stbu8(i8* %base, i64 %val) nounwind { | 74 define i8* @test_stbu8(i8* %base, i64 %val) nounwind { |
75 entry: | 75 entry: |
76 %conv = trunc i64 %val to i8 | 76 %conv = trunc i64 %val to i8 |
77 %arrayidx = getelementptr inbounds i8* %base, i64 16 | 77 %arrayidx = getelementptr inbounds i8, i8* %base, i64 16 |
78 store i8 %conv, i8* %arrayidx, align 1 | 78 store i8 %conv, i8* %arrayidx, align 1 |
79 ret i8* %arrayidx | 79 ret i8* %arrayidx |
80 } | 80 } |
81 ; CHECK: @test_stbu8 | 81 ; CHECK: @test_stbu8 |
82 ; CHECK: %entry | 82 ; CHECK: %entry |
84 ; CHECK-NEXT: blr | 84 ; CHECK-NEXT: blr |
85 | 85 |
86 define i8* @test_stbux8(i8* %base, i64 %val, i64 %offset) nounwind { | 86 define i8* @test_stbux8(i8* %base, i64 %val, i64 %offset) nounwind { |
87 entry: | 87 entry: |
88 %conv = trunc i64 %val to i8 | 88 %conv = trunc i64 %val to i8 |
89 %arrayidx = getelementptr inbounds i8* %base, i64 %offset | 89 %arrayidx = getelementptr inbounds i8, i8* %base, i64 %offset |
90 store i8 %conv, i8* %arrayidx, align 1 | 90 store i8 %conv, i8* %arrayidx, align 1 |
91 ret i8* %arrayidx | 91 ret i8* %arrayidx |
92 } | 92 } |
93 ; CHECK: @test_stbux8 | 93 ; CHECK: @test_stbux8 |
94 ; CHECK: %entry | 94 ; CHECK: %entry |
96 ; CHECK-NEXT: blr | 96 ; CHECK-NEXT: blr |
97 | 97 |
98 define i16* @test_sthu8(i16* %base, i64 %val) nounwind { | 98 define i16* @test_sthu8(i16* %base, i64 %val) nounwind { |
99 entry: | 99 entry: |
100 %conv = trunc i64 %val to i16 | 100 %conv = trunc i64 %val to i16 |
101 %arrayidx = getelementptr inbounds i16* %base, i64 16 | 101 %arrayidx = getelementptr inbounds i16, i16* %base, i64 16 |
102 store i16 %conv, i16* %arrayidx, align 2 | 102 store i16 %conv, i16* %arrayidx, align 2 |
103 ret i16* %arrayidx | 103 ret i16* %arrayidx |
104 } | 104 } |
105 ; CHECK: @test_sthu | 105 ; CHECK: @test_sthu |
106 ; CHECK: %entry | 106 ; CHECK: %entry |
108 ; CHECK-NEXT: blr | 108 ; CHECK-NEXT: blr |
109 | 109 |
110 define i16* @test_sthux8(i16* %base, i64 %val, i64 %offset) nounwind { | 110 define i16* @test_sthux8(i16* %base, i64 %val, i64 %offset) nounwind { |
111 entry: | 111 entry: |
112 %conv = trunc i64 %val to i16 | 112 %conv = trunc i64 %val to i16 |
113 %arrayidx = getelementptr inbounds i16* %base, i64 %offset | 113 %arrayidx = getelementptr inbounds i16, i16* %base, i64 %offset |
114 store i16 %conv, i16* %arrayidx, align 2 | 114 store i16 %conv, i16* %arrayidx, align 2 |
115 ret i16* %arrayidx | 115 ret i16* %arrayidx |
116 } | 116 } |
117 ; CHECK: @test_sthux | 117 ; CHECK: @test_sthux |
118 ; CHECK: %entry | 118 ; CHECK: %entry |
121 ; CHECK-NEXT: blr | 121 ; CHECK-NEXT: blr |
122 | 122 |
123 define i32* @test_stwu8(i32* %base, i64 %val) nounwind { | 123 define i32* @test_stwu8(i32* %base, i64 %val) nounwind { |
124 entry: | 124 entry: |
125 %conv = trunc i64 %val to i32 | 125 %conv = trunc i64 %val to i32 |
126 %arrayidx = getelementptr inbounds i32* %base, i64 16 | 126 %arrayidx = getelementptr inbounds i32, i32* %base, i64 16 |
127 store i32 %conv, i32* %arrayidx, align 4 | 127 store i32 %conv, i32* %arrayidx, align 4 |
128 ret i32* %arrayidx | 128 ret i32* %arrayidx |
129 } | 129 } |
130 ; CHECK: @test_stwu | 130 ; CHECK: @test_stwu |
131 ; CHECK: %entry | 131 ; CHECK: %entry |
133 ; CHECK-NEXT: blr | 133 ; CHECK-NEXT: blr |
134 | 134 |
135 define i32* @test_stwux8(i32* %base, i64 %val, i64 %offset) nounwind { | 135 define i32* @test_stwux8(i32* %base, i64 %val, i64 %offset) nounwind { |
136 entry: | 136 entry: |
137 %conv = trunc i64 %val to i32 | 137 %conv = trunc i64 %val to i32 |
138 %arrayidx = getelementptr inbounds i32* %base, i64 %offset | 138 %arrayidx = getelementptr inbounds i32, i32* %base, i64 %offset |
139 store i32 %conv, i32* %arrayidx, align 4 | 139 store i32 %conv, i32* %arrayidx, align 4 |
140 ret i32* %arrayidx | 140 ret i32* %arrayidx |
141 } | 141 } |
142 ; CHECK: @test_stwux | 142 ; CHECK: @test_stwux |
143 ; CHECK: %entry | 143 ; CHECK: %entry |
145 ; CHECK-NEXT: stwux | 145 ; CHECK-NEXT: stwux |
146 ; CHECK-NEXT: blr | 146 ; CHECK-NEXT: blr |
147 | 147 |
148 define i64* @test_stdu(i64* %base, i64 %val) nounwind { | 148 define i64* @test_stdu(i64* %base, i64 %val) nounwind { |
149 entry: | 149 entry: |
150 %arrayidx = getelementptr inbounds i64* %base, i64 16 | 150 %arrayidx = getelementptr inbounds i64, i64* %base, i64 16 |
151 store i64 %val, i64* %arrayidx, align 8 | 151 store i64 %val, i64* %arrayidx, align 8 |
152 ret i64* %arrayidx | 152 ret i64* %arrayidx |
153 } | 153 } |
154 ; CHECK: @test_stdu | 154 ; CHECK: @test_stdu |
155 ; CHECK: %entry | 155 ; CHECK: %entry |
156 ; CHECK-NEXT: stdu | 156 ; CHECK-NEXT: stdu |
157 ; CHECK-NEXT: blr | 157 ; CHECK-NEXT: blr |
158 | 158 |
159 define i64* @test_stdux(i64* %base, i64 %val, i64 %offset) nounwind { | 159 define i64* @test_stdux(i64* %base, i64 %val, i64 %offset) nounwind { |
160 entry: | 160 entry: |
161 %arrayidx = getelementptr inbounds i64* %base, i64 %offset | 161 %arrayidx = getelementptr inbounds i64, i64* %base, i64 %offset |
162 store i64 %val, i64* %arrayidx, align 8 | 162 store i64 %val, i64* %arrayidx, align 8 |
163 ret i64* %arrayidx | 163 ret i64* %arrayidx |
164 } | 164 } |
165 ; CHECK: @test_stdux | 165 ; CHECK: @test_stdux |
166 ; CHECK: %entry | 166 ; CHECK: %entry |