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comparison test/CodeGen/SystemZ/int-add-08.ll @ 95:afa8332a0e37 LLVM3.8

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LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents 95c75e76d11b
children c2174574ed3a
comparison
equal deleted inserted replaced
84:f3e34b893a5f 95:afa8332a0e37
9 define void @f1(i128 *%ptr) { 9 define void @f1(i128 *%ptr) {
10 ; CHECK-LABEL: f1: 10 ; CHECK-LABEL: f1:
11 ; CHECK: algr 11 ; CHECK: algr
12 ; CHECK: alcgr 12 ; CHECK: alcgr
13 ; CHECK: br %r14 13 ; CHECK: br %r14
14 %value = load i128 *%ptr 14 %value = load i128 , i128 *%ptr
15 %add = add i128 %value, %value 15 %add = add i128 %value, %value
16 store i128 %add, i128 *%ptr 16 store i128 %add, i128 *%ptr
17 ret void 17 ret void
18 } 18 }
19 19
23 ; CHECK-LABEL: f2: 23 ; CHECK-LABEL: f2:
24 ; CHECK: alg {{%r[0-5]}}, 8(%r3) 24 ; CHECK: alg {{%r[0-5]}}, 8(%r3)
25 ; CHECK: alcg {{%r[0-5]}}, 0(%r3) 25 ; CHECK: alcg {{%r[0-5]}}, 0(%r3)
26 ; CHECK: br %r14 26 ; CHECK: br %r14
27 %bptr = inttoptr i64 %addr to i128 * 27 %bptr = inttoptr i64 %addr to i128 *
28 %a = load volatile i128 *%aptr 28 %a = load volatile i128 , i128 *%aptr
29 %b = load i128 *%bptr 29 %b = load i128 , i128 *%bptr
30 %add = add i128 %a, %b 30 %add = add i128 %a, %b
31 store i128 %add, i128 *%aptr 31 store i128 %add, i128 *%aptr
32 ret void 32 ret void
33 } 33 }
34 34
38 ; CHECK: alg {{%r[0-5]}}, 524280(%r3) 38 ; CHECK: alg {{%r[0-5]}}, 524280(%r3)
39 ; CHECK: alcg {{%r[0-5]}}, 524272(%r3) 39 ; CHECK: alcg {{%r[0-5]}}, 524272(%r3)
40 ; CHECK: br %r14 40 ; CHECK: br %r14
41 %addr = add i64 %base, 524272 41 %addr = add i64 %base, 524272
42 %bptr = inttoptr i64 %addr to i128 * 42 %bptr = inttoptr i64 %addr to i128 *
43 %a = load volatile i128 *%aptr 43 %a = load volatile i128 , i128 *%aptr
44 %b = load i128 *%bptr 44 %b = load i128 , i128 *%bptr
45 %add = add i128 %a, %b 45 %add = add i128 %a, %b
46 store i128 %add, i128 *%aptr 46 store i128 %add, i128 *%aptr
47 ret void 47 ret void
48 } 48 }
49 49
55 ; CHECK: alg {{%r[0-5]}}, 0([[BASE]]) 55 ; CHECK: alg {{%r[0-5]}}, 0([[BASE]])
56 ; CHECK: alcg {{%r[0-5]}}, 524280(%r3) 56 ; CHECK: alcg {{%r[0-5]}}, 524280(%r3)
57 ; CHECK: br %r14 57 ; CHECK: br %r14
58 %addr = add i64 %base, 524280 58 %addr = add i64 %base, 524280
59 %bptr = inttoptr i64 %addr to i128 * 59 %bptr = inttoptr i64 %addr to i128 *
60 %a = load volatile i128 *%aptr 60 %a = load volatile i128 , i128 *%aptr
61 %b = load i128 *%bptr 61 %b = load i128 , i128 *%bptr
62 %add = add i128 %a, %b 62 %add = add i128 %a, %b
63 store i128 %add, i128 *%aptr 63 store i128 %add, i128 *%aptr
64 ret void 64 ret void
65 } 65 }
66 66
72 ; CHECK: alg {{%r[0-5]}}, 0({{%r[1-5]}}) 72 ; CHECK: alg {{%r[0-5]}}, 0({{%r[1-5]}})
73 ; CHECK: alcg {{%r[0-5]}}, 0({{%r[1-5]}}) 73 ; CHECK: alcg {{%r[0-5]}}, 0({{%r[1-5]}})
74 ; CHECK: br %r14 74 ; CHECK: br %r14
75 %addr = add i64 %base, 524288 75 %addr = add i64 %base, 524288
76 %bptr = inttoptr i64 %addr to i128 * 76 %bptr = inttoptr i64 %addr to i128 *
77 %a = load volatile i128 *%aptr 77 %a = load volatile i128 , i128 *%aptr
78 %b = load i128 *%bptr 78 %b = load i128 , i128 *%bptr
79 %add = add i128 %a, %b 79 %add = add i128 %a, %b
80 store i128 %add, i128 *%aptr 80 store i128 %add, i128 *%aptr
81 ret void 81 ret void
82 } 82 }
83 83
87 ; CHECK: alg {{%r[0-5]}}, -524280(%r3) 87 ; CHECK: alg {{%r[0-5]}}, -524280(%r3)
88 ; CHECK: alcg {{%r[0-5]}}, -524288(%r3) 88 ; CHECK: alcg {{%r[0-5]}}, -524288(%r3)
89 ; CHECK: br %r14 89 ; CHECK: br %r14
90 %addr = add i64 %base, -524288 90 %addr = add i64 %base, -524288
91 %bptr = inttoptr i64 %addr to i128 * 91 %bptr = inttoptr i64 %addr to i128 *
92 %a = load volatile i128 *%aptr 92 %a = load volatile i128 , i128 *%aptr
93 %b = load i128 *%bptr 93 %b = load i128 , i128 *%bptr
94 %add = add i128 %a, %b 94 %add = add i128 %a, %b
95 store i128 %add, i128 *%aptr 95 store i128 %add, i128 *%aptr
96 ret void 96 ret void
97 } 97 }
98 98
102 ; CHECK: alg {{%r[0-5]}}, -524288(%r3) 102 ; CHECK: alg {{%r[0-5]}}, -524288(%r3)
103 ; CHECK: alcg {{%r[0-5]}}, 0({{%r[1-5]}}) 103 ; CHECK: alcg {{%r[0-5]}}, 0({{%r[1-5]}})
104 ; CHECK: br %r14 104 ; CHECK: br %r14
105 %addr = add i64 %base, -524296 105 %addr = add i64 %base, -524296
106 %bptr = inttoptr i64 %addr to i128 * 106 %bptr = inttoptr i64 %addr to i128 *
107 %a = load volatile i128 *%aptr 107 %a = load volatile i128 , i128 *%aptr
108 %b = load i128 *%bptr 108 %b = load i128 , i128 *%bptr
109 %add = add i128 %a, %b 109 %add = add i128 %a, %b
110 store i128 %add, i128 *%aptr 110 store i128 %add, i128 *%aptr
111 ret void 111 ret void
112 } 112 }
113 113
117 ; CHECK-LABEL: f8: 117 ; CHECK-LABEL: f8:
118 ; CHECK: brasl %r14, foo@PLT 118 ; CHECK: brasl %r14, foo@PLT
119 ; CHECK: alg {{%r[0-9]+}}, {{[0-9]+}}(%r15) 119 ; CHECK: alg {{%r[0-9]+}}, {{[0-9]+}}(%r15)
120 ; CHECK: alcg {{%r[0-9]+}}, {{[0-9]+}}(%r15) 120 ; CHECK: alcg {{%r[0-9]+}}, {{[0-9]+}}(%r15)
121 ; CHECK: br %r14 121 ; CHECK: br %r14
122 %ptr1 = getelementptr i128 *%ptr0, i128 2 122 %ptr1 = getelementptr i128, i128 *%ptr0, i128 2
123 %ptr2 = getelementptr i128 *%ptr0, i128 4 123 %ptr2 = getelementptr i128, i128 *%ptr0, i128 4
124 %ptr3 = getelementptr i128 *%ptr0, i128 6 124 %ptr3 = getelementptr i128, i128 *%ptr0, i128 6
125 %ptr4 = getelementptr i128 *%ptr0, i128 8 125 %ptr4 = getelementptr i128, i128 *%ptr0, i128 8
126 126
127 %val0 = load i128 *%ptr0 127 %val0 = load i128 , i128 *%ptr0
128 %val1 = load i128 *%ptr1 128 %val1 = load i128 , i128 *%ptr1
129 %val2 = load i128 *%ptr2 129 %val2 = load i128 , i128 *%ptr2
130 %val3 = load i128 *%ptr3 130 %val3 = load i128 , i128 *%ptr3
131 %val4 = load i128 *%ptr4 131 %val4 = load i128 , i128 *%ptr4
132 132
133 %retptr = call i128 *@foo() 133 %retptr = call i128 *@foo()
134 134
135 %ret = load i128 *%retptr 135 %ret = load i128 , i128 *%retptr
136 %add0 = add i128 %ret, %val0 136 %add0 = add i128 %ret, %val0
137 %add1 = add i128 %add0, %val1 137 %add1 = add i128 %add0, %val1
138 %add2 = add i128 %add1, %val2 138 %add2 = add i128 %add1, %val2
139 %add3 = add i128 %add2, %val3 139 %add3 = add i128 %add2, %val3
140 %add4 = add i128 %add3, %val4 140 %add4 = add i128 %add3, %val4