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comparison test/CodeGen/X86/anyregcc.ll @ 95:afa8332a0e37 LLVM3.8

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LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents 54457678186b
children 1172e4bd9c6f
comparison
equal deleted inserted replaced
84:f3e34b893a5f 95:afa8332a0e37
58 ; CHECK-NEXT: .byte 8 58 ; CHECK-NEXT: .byte 8
59 ; CHECK-NEXT: .short 0 59 ; CHECK-NEXT: .short 0
60 ; CHECK-NEXT: .long 3 60 ; CHECK-NEXT: .long 3
61 define i64 @test() nounwind ssp uwtable { 61 define i64 @test() nounwind ssp uwtable {
62 entry: 62 entry:
63 call anyregcc void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 0, i32 15, i8* null, i32 2, i32 1, i32 2, i64 3) 63 call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 0, i32 15, i8* null, i32 2, i32 1, i32 2, i64 3)
64 ret i64 0 64 ret i64 0
65 } 65 }
66 66
67 ; property access 1 - %obj is an anyreg call argument and should therefore be in a register 67 ; property access 1 - %obj is an anyreg call argument and should therefore be in a register
68 ; CHECK-LABEL: .long L{{.*}}-_property_access1 68 ; CHECK-LABEL: .long L{{.*}}-_property_access1
80 ; CHECK-NEXT: .short {{[0-9]+}} 80 ; CHECK-NEXT: .short {{[0-9]+}}
81 ; CHECK-NEXT: .long 0 81 ; CHECK-NEXT: .long 0
82 define i64 @property_access1(i8* %obj) nounwind ssp uwtable { 82 define i64 @property_access1(i8* %obj) nounwind ssp uwtable {
83 entry: 83 entry:
84 %f = inttoptr i64 12297829382473034410 to i8* 84 %f = inttoptr i64 12297829382473034410 to i8*
85 %ret = call anyregcc i64 (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.i64(i64 1, i32 15, i8* %f, i32 1, i8* %obj) 85 %ret = call anyregcc i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 1, i32 15, i8* %f, i32 1, i8* %obj)
86 ret i64 %ret 86 ret i64 %ret
87 } 87 }
88 88
89 ; property access 2 - %obj is an anyreg call argument and should therefore be in a register 89 ; property access 2 - %obj is an anyreg call argument and should therefore be in a register
90 ; CHECK-LABEL: .long L{{.*}}-_property_access2 90 ; CHECK-LABEL: .long L{{.*}}-_property_access2
103 ; CHECK-NEXT: .long 0 103 ; CHECK-NEXT: .long 0
104 define i64 @property_access2() nounwind ssp uwtable { 104 define i64 @property_access2() nounwind ssp uwtable {
105 entry: 105 entry:
106 %obj = alloca i64, align 8 106 %obj = alloca i64, align 8
107 %f = inttoptr i64 12297829382473034410 to i8* 107 %f = inttoptr i64 12297829382473034410 to i8*
108 %ret = call anyregcc i64 (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.i64(i64 2, i32 15, i8* %f, i32 1, i64* %obj) 108 %ret = call anyregcc i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 2, i32 15, i8* %f, i32 1, i64* %obj)
109 ret i64 %ret 109 ret i64 %ret
110 } 110 }
111 111
112 ; property access 3 - %obj is a frame index 112 ; property access 3 - %obj is a frame index
113 ; CHECK-LABEL: .long L{{.*}}-_property_access3 113 ; CHECK-LABEL: .long L{{.*}}-_property_access3
126 ; CHECK-NEXT: .long 126 ; CHECK-NEXT: .long
127 define i64 @property_access3() nounwind ssp uwtable { 127 define i64 @property_access3() nounwind ssp uwtable {
128 entry: 128 entry:
129 %obj = alloca i64, align 8 129 %obj = alloca i64, align 8
130 %f = inttoptr i64 12297829382473034410 to i8* 130 %f = inttoptr i64 12297829382473034410 to i8*
131 %ret = call anyregcc i64 (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.i64(i64 3, i32 15, i8* %f, i32 0, i64* %obj) 131 %ret = call anyregcc i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 3, i32 15, i8* %f, i32 0, i64* %obj)
132 ret i64 %ret 132 ret i64 %ret
133 } 133 }
134 134
135 ; anyreg_test1 135 ; anyreg_test1
136 ; CHECK-LABEL: .long L{{.*}}-_anyreg_test1 136 ; CHECK-LABEL: .long L{{.*}}-_anyreg_test1
208 ; CHECK-NEXT: .short {{[0-9]+}} 208 ; CHECK-NEXT: .short {{[0-9]+}}
209 ; CHECK-NEXT: .long 0 209 ; CHECK-NEXT: .long 0
210 define i64 @anyreg_test1(i8* %a1, i8* %a2, i8* %a3, i8* %a4, i8* %a5, i8* %a6, i8* %a7, i8* %a8, i8* %a9, i8* %a10, i8* %a11, i8* %a12, i8* %a13) nounwind ssp uwtable { 210 define i64 @anyreg_test1(i8* %a1, i8* %a2, i8* %a3, i8* %a4, i8* %a5, i8* %a6, i8* %a7, i8* %a8, i8* %a9, i8* %a10, i8* %a11, i8* %a12, i8* %a13) nounwind ssp uwtable {
211 entry: 211 entry:
212 %f = inttoptr i64 12297829382473034410 to i8* 212 %f = inttoptr i64 12297829382473034410 to i8*
213 %ret = call anyregcc i64 (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.i64(i64 4, i32 15, i8* %f, i32 13, i8* %a1, i8* %a2, i8* %a3, i8* %a4, i8* %a5, i8* %a6, i8* %a7, i8* %a8, i8* %a9, i8* %a10, i8* %a11, i8* %a12, i8* %a13) 213 %ret = call anyregcc i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 4, i32 15, i8* %f, i32 13, i8* %a1, i8* %a2, i8* %a3, i8* %a4, i8* %a5, i8* %a6, i8* %a7, i8* %a8, i8* %a9, i8* %a10, i8* %a11, i8* %a12, i8* %a13)
214 ret i64 %ret 214 ret i64 %ret
215 } 215 }
216 216
217 ; anyreg_test2 217 ; anyreg_test2
218 ; CHECK-LABEL: .long L{{.*}}-_anyreg_test2 218 ; CHECK-LABEL: .long L{{.*}}-_anyreg_test2
290 ; CHECK-NEXT: .short {{[0-9]+}} 290 ; CHECK-NEXT: .short {{[0-9]+}}
291 ; CHECK-NEXT: .long 0 291 ; CHECK-NEXT: .long 0
292 define i64 @anyreg_test2(i8* %a1, i8* %a2, i8* %a3, i8* %a4, i8* %a5, i8* %a6, i8* %a7, i8* %a8, i8* %a9, i8* %a10, i8* %a11, i8* %a12, i8* %a13) nounwind ssp uwtable { 292 define i64 @anyreg_test2(i8* %a1, i8* %a2, i8* %a3, i8* %a4, i8* %a5, i8* %a6, i8* %a7, i8* %a8, i8* %a9, i8* %a10, i8* %a11, i8* %a12, i8* %a13) nounwind ssp uwtable {
293 entry: 293 entry:
294 %f = inttoptr i64 12297829382473034410 to i8* 294 %f = inttoptr i64 12297829382473034410 to i8*
295 %ret = call anyregcc i64 (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.i64(i64 5, i32 15, i8* %f, i32 8, i8* %a1, i8* %a2, i8* %a3, i8* %a4, i8* %a5, i8* %a6, i8* %a7, i8* %a8, i8* %a9, i8* %a10, i8* %a11, i8* %a12, i8* %a13) 295 %ret = call anyregcc i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 5, i32 15, i8* %f, i32 8, i8* %a1, i8* %a2, i8* %a3, i8* %a4, i8* %a5, i8* %a6, i8* %a7, i8* %a8, i8* %a9, i8* %a10, i8* %a11, i8* %a12, i8* %a13)
296 ret i64 %ret 296 ret i64 %ret
297 } 297 }
298 298
299 ; Test spilling the return value of an anyregcc call. 299 ; Test spilling the return value of an anyregcc call.
300 ; 300 ;
318 ; CHECK-NEXT: .byte 8 318 ; CHECK-NEXT: .byte 8
319 ; CHECK-NEXT: .short 4 319 ; CHECK-NEXT: .short 4
320 ; CHECK-NEXT: .long 0 320 ; CHECK-NEXT: .long 0
321 define i64 @patchpoint_spilldef(i64 %p1, i64 %p2, i64 %p3, i64 %p4) { 321 define i64 @patchpoint_spilldef(i64 %p1, i64 %p2, i64 %p3, i64 %p4) {
322 entry: 322 entry:
323 %result = tail call anyregcc i64 (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.i64(i64 12, i32 15, i8* inttoptr (i64 0 to i8*), i32 2, i64 %p1, i64 %p2) 323 %result = tail call anyregcc i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 12, i32 15, i8* inttoptr (i64 0 to i8*), i32 2, i64 %p1, i64 %p2)
324 tail call void asm sideeffect "nop", "~{ax},~{bx},~{cx},~{dx},~{bp},~{si},~{di},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind 324 tail call void asm sideeffect "nop", "~{ax},~{bx},~{cx},~{dx},~{bp},~{si},~{di},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
325 ret i64 %result 325 ret i64 %result
326 } 326 }
327 327
328 ; Test spilling the arguments of an anyregcc call. 328 ; Test spilling the arguments of an anyregcc call.
358 ; CHECK-NEXT: .short 6 358 ; CHECK-NEXT: .short 6
359 ; CHECK-NEXT: .long 359 ; CHECK-NEXT: .long
360 define i64 @patchpoint_spillargs(i64 %p1, i64 %p2, i64 %p3, i64 %p4) { 360 define i64 @patchpoint_spillargs(i64 %p1, i64 %p2, i64 %p3, i64 %p4) {
361 entry: 361 entry:
362 tail call void asm sideeffect "nop", "~{ax},~{bx},~{cx},~{dx},~{bp},~{si},~{di},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind 362 tail call void asm sideeffect "nop", "~{ax},~{bx},~{cx},~{dx},~{bp},~{si},~{di},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
363 %result = tail call anyregcc i64 (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.i64(i64 13, i32 15, i8* inttoptr (i64 0 to i8*), i32 2, i64 %p1, i64 %p2, i64 %p3, i64 %p4) 363 %result = tail call anyregcc i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 13, i32 15, i8* inttoptr (i64 0 to i8*), i32 2, i64 %p1, i64 %p2, i64 %p3, i64 %p4)
364 ret i64 %result 364 ret i64 %result
365 } 365 }
366 366
367 ; Make sure all regs are spilled 367 ; Make sure all regs are spilled
368 define anyregcc void @anyregcc1() { 368 define anyregcc void @anyregcc1() {