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comparison test/CodeGen/X86/merge-store-partially-alias-loads.ll @ 95:afa8332a0e37 LLVM3.8

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LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents
children 1172e4bd9c6f
comparison
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84:f3e34b893a5f 95:afa8332a0e37
1 ; REQUIRES: asserts
2 ; RUN: llc -march=x86-64 -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck -check-prefix=X86 %s
3 ; RUN: llc -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -debug-only=isel < %s 2>&1 | FileCheck -check-prefix=DBGDAG %s
4
5 ; It's OK to merge the load / store of the first 2 components, but
6 ; they must not be placed on the same chain after merging.
7
8 ; X86-LABEL: {{^}}merge_store_partial_overlap_load:
9 ; X86-DAG: movw ([[BASEREG:%[a-z]+]]), [[LO2:%[a-z]+]]
10 ; X86-DAG: movb 2([[BASEREG]]), [[HI1:%[a-z]+]]
11
12 ; X86-NEXT: movw [[LO2]], 1([[BASEREG]])
13 ; X86-NEXT: movb [[HI1]], 3([[BASEREG]])
14 ; X86-NEXT: retq
15
16 ; DBGDAG-LABEL: Optimized lowered selection DAG: BB#0 'merge_store_partial_overlap_load:'
17 ; DBGDAG: [[ENTRYTOKEN:t[0-9]+]]: ch = EntryToken
18 ; DBGDAG-DAG: [[BASEPTR:t[0-9]+]]: i64,ch = CopyFromReg [[ENTRYTOKEN]],
19 ; DBGDAG-DAG: [[ADDPTR:t[0-9]+]]: i64 = add [[BASEPTR]], Constant:i64<2>
20
21 ; DBGDAG-DAG: [[LD2:t[0-9]+]]: i16,ch = load<LD2[%tmp81](align=1)> [[ENTRYTOKEN]], [[BASEPTR]], undef:i64
22 ; DBGDAG-DAG: [[LD1:t[0-9]+]]: i8,ch = load<LD1[%tmp12]> [[ENTRYTOKEN]], [[ADDPTR]], undef:i64
23
24 ; DBGDAG: [[LOADTOKEN:t[0-9]+]]: ch = TokenFactor [[LD2]]:1, [[LD1]]:1
25
26 ; DBGDAG-DAG: [[ST2:t[0-9]+]]: ch = store<ST2[%tmp10](align=1)> [[LOADTOKEN]], [[LD2]], t{{[0-9]+}}, undef:i64
27 ; DBGDAG-DAG: [[ST1:t[0-9]+]]: ch = store<ST1[%tmp14]> [[ST2]], [[LD1]], t{{[0-9]+}}, undef:i64
28 ; DBGDAG: X86ISD::RET_FLAG [[ST1]],
29
30 ; DBGDAG: Type-legalized selection DAG: BB#0 'merge_store_partial_overlap_load:'
31 define void @merge_store_partial_overlap_load([4 x i8]* %tmp) {
32 %tmp8 = getelementptr inbounds [4 x i8], [4 x i8]* %tmp, i32 0, i8 0
33 %tmp10 = getelementptr inbounds [4 x i8], [4 x i8]* %tmp, i32 0, i8 1
34 %tmp12 = getelementptr inbounds [4 x i8], [4 x i8]* %tmp, i32 0, i8 2
35 %tmp14 = getelementptr [4 x i8], [4 x i8]* %tmp, i32 0, i8 3
36
37 %tmp9 = load i8, i8* %tmp8, align 1 ; base + 0
38 %tmp11 = load i8, i8* %tmp10, align 1 ; base + 1
39 %tmp13 = load i8, i8* %tmp12, align 1 ; base + 2
40
41 store i8 %tmp9, i8* %tmp10, align 1 ; base + 1
42 store i8 %tmp11, i8* %tmp12, align 1 ; base + 2
43 store i8 %tmp13, i8* %tmp14, align 1 ; base + 3
44
45 ; Should emit
46 ; load base + 0, base + 1
47 ; store base + 1, base + 2
48 ; load base + 2
49 ; store base + 3
50
51 ret void
52 }