comparison test/CodeGen/X86/rotate4.ll @ 95:afa8332a0e37 LLVM3.8

LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents 54457678186b
children 803732b1fca8
comparison
equal deleted inserted replaced
84:f3e34b893a5f 95:afa8332a0e37
66 ; CHECK-NOT: and 66 ; CHECK-NOT: and
67 ; CHECK: roll 67 ; CHECK: roll
68 ; no store: 68 ; no store:
69 ; CHECK-NOT: mov 69 ; CHECK-NOT: mov
70 entry: 70 entry:
71 %a = load i32* %pa, align 16 71 %a = load i32, i32* %pa, align 16
72 %and = and i32 %b, 31 72 %and = and i32 %b, 31
73 %shl = shl i32 %a, %and 73 %shl = shl i32 %a, %and
74 %0 = sub i32 0, %b 74 %0 = sub i32 0, %b
75 %and3 = and i32 %0, 31 75 %and3 = and i32 %0, 31
76 %shr = lshr i32 %a, %and3 76 %shr = lshr i32 %a, %and3
84 ; CHECK-NOT: and 84 ; CHECK-NOT: and
85 ; CHECK: rorl 85 ; CHECK: rorl
86 ; no store: 86 ; no store:
87 ; CHECK-NOT: mov 87 ; CHECK-NOT: mov
88 entry: 88 entry:
89 %a = load i32* %pa, align 16 89 %a = load i32, i32* %pa, align 16
90 %and = and i32 %b, 31 90 %and = and i32 %b, 31
91 %shl = lshr i32 %a, %and 91 %shl = lshr i32 %a, %and
92 %0 = sub i32 0, %b 92 %0 = sub i32 0, %b
93 %and3 = and i32 %0, 31 93 %and3 = and i32 %0, 31
94 %shr = shl i32 %a, %and3 94 %shr = shl i32 %a, %and3
102 ; CHECK-NOT: and 102 ; CHECK-NOT: and
103 ; CHECK: rolq 103 ; CHECK: rolq
104 ; no store: 104 ; no store:
105 ; CHECK-NOT: mov 105 ; CHECK-NOT: mov
106 entry: 106 entry:
107 %a = load i64* %pa, align 16 107 %a = load i64, i64* %pa, align 16
108 %and = and i64 %b, 63 108 %and = and i64 %b, 63
109 %shl = shl i64 %a, %and 109 %shl = shl i64 %a, %and
110 %0 = sub i64 0, %b 110 %0 = sub i64 0, %b
111 %and3 = and i64 %0, 63 111 %and3 = and i64 %0, 63
112 %shr = lshr i64 %a, %and3 112 %shr = lshr i64 %a, %and3
120 ; CHECK-NOT: and 120 ; CHECK-NOT: and
121 ; CHECK: rorq 121 ; CHECK: rorq
122 ; no store: 122 ; no store:
123 ; CHECK-NOT: mov 123 ; CHECK-NOT: mov
124 entry: 124 entry:
125 %a = load i64* %pa, align 16 125 %a = load i64, i64* %pa, align 16
126 %and = and i64 %b, 63 126 %and = and i64 %b, 63
127 %shl = lshr i64 %a, %and 127 %shl = lshr i64 %a, %and
128 %0 = sub i64 0, %b 128 %0 = sub i64 0, %b
129 %and3 = and i64 %0, 63 129 %and3 = and i64 %0, 63
130 %shr = shl i64 %a, %and3 130 %shr = shl i64 %a, %and3