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comparison test/CodeGen/X86/sse41-intrinsics-x86.ll @ 95:afa8332a0e37 LLVM3.8

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LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents 54457678186b
children 1172e4bd9c6f
comparison
equal deleted inserted replaced
84:f3e34b893a5f 95:afa8332a0e37
1 ; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse4.1 | FileCheck %s 1 ; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse4.1 | FileCheck %s
2 ; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=knl | FileCheck %s
2 3
3 define <2 x double> @test_x86_sse41_blendpd(<2 x double> %a0, <2 x double> %a1) { 4 define <2 x double> @test_x86_sse41_blendpd(<2 x double> %a0, <2 x double> %a1) {
4 ; CHECK: blendpd 5 ; CHECK: blendpd
5 %res = call <2 x double> @llvm.x86.sse41.blendpd(<2 x double> %a0, <2 x double> %a1, i8 7) ; <<2 x double>> [#uses=1] 6 %res = call <2 x double> @llvm.x86.sse41.blendpd(<2 x double> %a0, <2 x double> %a1, i8 7) ; <<2 x double>> [#uses=1]
6 ret <2 x double> %res 7 ret <2 x double> %res
157 ; CHECK: pminuw 158 ; CHECK: pminuw
158 %res = call <8 x i16> @llvm.x86.sse41.pminuw(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] 159 %res = call <8 x i16> @llvm.x86.sse41.pminuw(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1]
159 ret <8 x i16> %res 160 ret <8 x i16> %res
160 } 161 }
161 declare <8 x i16> @llvm.x86.sse41.pminuw(<8 x i16>, <8 x i16>) nounwind readnone 162 declare <8 x i16> @llvm.x86.sse41.pminuw(<8 x i16>, <8 x i16>) nounwind readnone
162
163
164 define <4 x i32> @test_x86_sse41_pmovsxbd(<16 x i8> %a0) {
165 ; CHECK: pmovsxbd
166 %res = call <4 x i32> @llvm.x86.sse41.pmovsxbd(<16 x i8> %a0) ; <<4 x i32>> [#uses=1]
167 ret <4 x i32> %res
168 }
169 declare <4 x i32> @llvm.x86.sse41.pmovsxbd(<16 x i8>) nounwind readnone
170
171
172 define <2 x i64> @test_x86_sse41_pmovsxbq(<16 x i8> %a0) {
173 ; CHECK: pmovsxbq
174 %res = call <2 x i64> @llvm.x86.sse41.pmovsxbq(<16 x i8> %a0) ; <<2 x i64>> [#uses=1]
175 ret <2 x i64> %res
176 }
177 declare <2 x i64> @llvm.x86.sse41.pmovsxbq(<16 x i8>) nounwind readnone
178
179
180 define <8 x i16> @test_x86_sse41_pmovsxbw(<16 x i8> %a0) {
181 ; CHECK: pmovsxbw
182 %res = call <8 x i16> @llvm.x86.sse41.pmovsxbw(<16 x i8> %a0) ; <<8 x i16>> [#uses=1]
183 ret <8 x i16> %res
184 }
185 declare <8 x i16> @llvm.x86.sse41.pmovsxbw(<16 x i8>) nounwind readnone
186
187
188 define <2 x i64> @test_x86_sse41_pmovsxdq(<4 x i32> %a0) {
189 ; CHECK: pmovsxdq
190 %res = call <2 x i64> @llvm.x86.sse41.pmovsxdq(<4 x i32> %a0) ; <<2 x i64>> [#uses=1]
191 ret <2 x i64> %res
192 }
193 declare <2 x i64> @llvm.x86.sse41.pmovsxdq(<4 x i32>) nounwind readnone
194
195
196 define <4 x i32> @test_x86_sse41_pmovsxwd(<8 x i16> %a0) {
197 ; CHECK: pmovsxwd
198 %res = call <4 x i32> @llvm.x86.sse41.pmovsxwd(<8 x i16> %a0) ; <<4 x i32>> [#uses=1]
199 ret <4 x i32> %res
200 }
201 declare <4 x i32> @llvm.x86.sse41.pmovsxwd(<8 x i16>) nounwind readnone
202
203
204 define <2 x i64> @test_x86_sse41_pmovsxwq(<8 x i16> %a0) {
205 ; CHECK: pmovsxwq
206 %res = call <2 x i64> @llvm.x86.sse41.pmovsxwq(<8 x i16> %a0) ; <<2 x i64>> [#uses=1]
207 ret <2 x i64> %res
208 }
209 declare <2 x i64> @llvm.x86.sse41.pmovsxwq(<8 x i16>) nounwind readnone
210 163
211 164
212 define <4 x i32> @test_x86_sse41_pmovzxbd(<16 x i8> %a0) { 165 define <4 x i32> @test_x86_sse41_pmovzxbd(<16 x i8> %a0) {
213 ; CHECK: pmovzxbd 166 ; CHECK: pmovzxbd
214 %res = call <4 x i32> @llvm.x86.sse41.pmovzxbd(<16 x i8> %a0) ; <<4 x i32>> [#uses=1] 167 %res = call <4 x i32> @llvm.x86.sse41.pmovzxbd(<16 x i8> %a0) ; <<4 x i32>> [#uses=1]