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comparison test/CodeGen/AMDGPU/max.ll @ 147:c2174574ed3a

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LLVM 10
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Wed, 14 Aug 2019 16:55:33 +0900
parents 803732b1fca8
children
comparison
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134:3a76565eade5 147:c2174574ed3a
1 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 1 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=pitcairn < %s | FileCheck -enable-var-scope -check-prefix=SI -check-prefix=FUNC %s
2 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s 2 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=r600 -mcpu=cypress < %s | FileCheck -enable-var-scope -check-prefix=EG -check-prefix=FUNC %s
3 3
4 4
5 ; FUNC-LABEL: {{^}}v_test_imax_sge_i32: 5 ; FUNC-LABEL: {{^}}v_test_imax_sge_i32:
6 ; SI: v_max_i32_e32 6 ; SI: v_max_i32_e32
7 7
214 ret void 214 ret void
215 } 215 }
216 216
217 ; Make sure redundant and removed 217 ; Make sure redundant and removed
218 ; FUNC-LABEL: {{^}}simplify_demanded_bits_test_umax_ugt_i16: 218 ; FUNC-LABEL: {{^}}simplify_demanded_bits_test_umax_ugt_i16:
219 ; SI-DAG: s_load_dword [[A:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xb 219 ; SI-DAG: s_load_dword [[A:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0x13
220 ; SI-DAG: s_load_dword [[B:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xc 220 ; SI-DAG: s_load_dword [[B:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0x1c
221 ; SI: s_max_u32 [[MAX:s[0-9]+]], [[A]], [[B]] 221 ; SI: s_max_u32 [[MAX:s[0-9]+]], [[A]], [[B]]
222 ; SI: v_mov_b32_e32 [[VMAX:v[0-9]+]], [[MAX]] 222 ; SI: v_mov_b32_e32 [[VMAX:v[0-9]+]], [[MAX]]
223 ; SI: buffer_store_dword [[VMAX]] 223 ; SI: buffer_store_dword [[VMAX]]
224 224
225 ; EG: MAX_UINT 225 ; EG: MAX_UINT
226 define amdgpu_kernel void @simplify_demanded_bits_test_umax_ugt_i16(i32 addrspace(1)* %out, i16 zeroext %a, i16 zeroext %b) nounwind { 226 define amdgpu_kernel void @simplify_demanded_bits_test_umax_ugt_i16(i32 addrspace(1)* %out, [8 x i32], i16 zeroext %a, [8 x i32], i16 zeroext %b) nounwind {
227 %a.ext = zext i16 %a to i32 227 %a.ext = zext i16 %a to i32
228 %b.ext = zext i16 %b to i32 228 %b.ext = zext i16 %b to i32
229 %cmp = icmp ugt i32 %a.ext, %b.ext 229 %cmp = icmp ugt i32 %a.ext, %b.ext
230 %val = select i1 %cmp, i32 %a.ext, i32 %b.ext 230 %val = select i1 %cmp, i32 %a.ext, i32 %b.ext
231 %mask = and i32 %val, 65535 231 %mask = and i32 %val, 65535
234 } 234 }
235 235
236 ; Make sure redundant sign_extend_inreg removed. 236 ; Make sure redundant sign_extend_inreg removed.
237 237
238 ; FUNC-LABEL: {{^}}simplify_demanded_bits_test_max_slt_i16: 238 ; FUNC-LABEL: {{^}}simplify_demanded_bits_test_max_slt_i16:
239 ; SI-DAG: s_load_dword [[A:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xb 239 ; SI-DAG: s_load_dword [[A:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0x13
240 ; SI-DAG: s_load_dword [[B:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xc 240 ; SI-DAG: s_load_dword [[B:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0x1c
241 ; SI: s_max_i32 [[MAX:s[0-9]+]], [[A]], [[B]] 241 ; SI-DAG: s_sext_i32_i16 [[EXT_A:s[0-9]+]], [[A]]
242 ; SI-DAG: s_sext_i32_i16 [[EXT_B:s[0-9]+]], [[B]]
243
244 ; SI: s_max_i32 [[MAX:s[0-9]+]], [[EXT_A]], [[EXT_B]]
242 ; SI: v_mov_b32_e32 [[VMAX:v[0-9]+]], [[MAX]] 245 ; SI: v_mov_b32_e32 [[VMAX:v[0-9]+]], [[MAX]]
243 ; SI: buffer_store_dword [[VMAX]] 246 ; SI: buffer_store_dword [[VMAX]]
244 247
245 ; EG: MAX_INT 248 ; EG: MAX_INT
246 define amdgpu_kernel void @simplify_demanded_bits_test_max_slt_i16(i32 addrspace(1)* %out, i16 signext %a, i16 signext %b) nounwind { 249 define amdgpu_kernel void @simplify_demanded_bits_test_max_slt_i16(i32 addrspace(1)* %out, [8 x i32], i16 signext %a, [8 x i32], i16 signext %b) nounwind {
247 %a.ext = sext i16 %a to i32 250 %a.ext = sext i16 %a to i32
248 %b.ext = sext i16 %b to i32 251 %b.ext = sext i16 %b to i32
249 %cmp = icmp sgt i32 %a.ext, %b.ext 252 %cmp = icmp sgt i32 %a.ext, %b.ext
250 %val = select i1 %cmp, i32 %a.ext, i32 %b.ext 253 %val = select i1 %cmp, i32 %a.ext, i32 %b.ext
251 %shl = shl i32 %val, 16 254 %shl = shl i32 %val, 16
260 ; SI: s_sext_i32_i16 263 ; SI: s_sext_i32_i16
261 ; SI: s_sext_i32_i16 264 ; SI: s_sext_i32_i16
262 ; SI: s_max_i32 265 ; SI: s_max_i32
263 266
264 ; EG: MAX_INT 267 ; EG: MAX_INT
265 define amdgpu_kernel void @s_test_imax_sge_i16(i16 addrspace(1)* %out, i16 %a, i16 %b) nounwind { 268 define amdgpu_kernel void @s_test_imax_sge_i16(i16 addrspace(1)* %out, [8 x i32], i16 %a, [8 x i32], i16 %b) nounwind {
266 %cmp = icmp sge i16 %a, %b 269 %cmp = icmp sge i16 %a, %b
267 %val = select i1 %cmp, i16 %a, i16 %b 270 %val = select i1 %cmp, i16 %a, i16 %b
268 store i16 %val, i16 addrspace(1)* %out 271 store i16 %val, i16 addrspace(1)* %out
269 ret void 272 ret void
270 } 273 }