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comparison llvm/test/CodeGen/AMDGPU/fmed3.ll @ 236:c4bab56944e8 llvm-original

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LLVM 16
author kono
date Wed, 09 Nov 2022 17:45:10 +0900
parents 1d019706d866
children 1f2b6ac9f198
comparison
equal deleted inserted replaced
232:70dce7da266c 236:c4bab56944e8
968 ret void 968 ret void
969 } 969 }
970 970
971 ; FIXME: Simple stores do not work as a multiple use because they are bitcasted to integer constants. 971 ; FIXME: Simple stores do not work as a multiple use because they are bitcasted to integer constants.
972 ; GCN-LABEL: {{^}}one_non_inline_constant: 972 ; GCN-LABEL: {{^}}one_non_inline_constant:
973 ; GCN-DAG: s_mov_b32 [[K1:s[0-9]+]], 0x41800000 973 ; GCN-DAG: v_mov_b32_e32 [[K1:v[0-9]+]], 0x41800000
974 ; GCN-DAG: v_add_f32_e32 [[ADD:v[0-9]+]], 0.5, 974 ; GCN-DAG: v_add_f32_e32 [[ADD:v[0-9]+]], 0.5,
975 ; GCN: v_med3_f32 v{{[0-9]+}}, [[ADD]], 1.0, [[K1]] 975 ; GCN: v_med3_f32 v{{[0-9]+}}, [[ADD]], 1.0, [[K1]]
976 define amdgpu_kernel void @one_non_inline_constant(float addrspace(1)* %out, float addrspace(1)* %aptr) #1 { 976 define amdgpu_kernel void @one_non_inline_constant(float addrspace(1)* %out, float addrspace(1)* %aptr) #1 {
977 %tid = call i32 @llvm.amdgcn.workitem.id.x() 977 %tid = call i32 @llvm.amdgcn.workitem.id.x()
978 %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid 978 %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
988 store volatile float %extra.use, float addrspace(1)* undef 988 store volatile float %extra.use, float addrspace(1)* undef
989 ret void 989 ret void
990 } 990 }
991 991
992 ; GCN-LABEL: {{^}}two_non_inline_constant_multi_use: 992 ; GCN-LABEL: {{^}}two_non_inline_constant_multi_use:
993 ; GCN-DAG: s_mov_b32 [[K1:s[0-9]+]], 0x41800000
994 ; GCN-DAG: s_mov_b32 [[K0:s[0-9]+]], 0x41000000 993 ; GCN-DAG: s_mov_b32 [[K0:s[0-9]+]], 0x41000000
995 ; GCN-DAG: v_mov_b32_e32 [[VK1:v[0-9]+]], [[K1]] 994 ; GCN-DAG: v_mov_b32_e32 [[VK1:v[0-9]+]], 0x41800000
996 ; GCN-DAG: v_add_f32_e32 [[ADD:v[0-9]+]], 0.5, 995 ; GCN-DAG: v_add_f32_e32 [[ADD:v[0-9]+]], 0.5,
997 ; GCN: v_med3_f32 v{{[0-9]+}}, [[ADD]], [[K0]], [[VK1]] 996 ; GCN: v_med3_f32 v{{[0-9]+}}, [[ADD]], [[K0]], [[VK1]]
998 define amdgpu_kernel void @two_non_inline_constant_multi_use(float addrspace(1)* %out, float addrspace(1)* %aptr) #1 { 997 define amdgpu_kernel void @two_non_inline_constant_multi_use(float addrspace(1)* %out, float addrspace(1)* %aptr) #1 {
999 %tid = call i32 @llvm.amdgcn.workitem.id.x() 998 %tid = call i32 @llvm.amdgcn.workitem.id.x()
1000 %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid 999 %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid