comparison llvm/test/CodeGen/AMDGPU/insert-skips-flat-vmem-ds.mir @ 236:c4bab56944e8 llvm-original

LLVM 16
author kono
date Wed, 09 Nov 2022 17:45:10 +0900
parents 79ff65ed7e25
children 1f2b6ac9f198
comparison
equal deleted inserted replaced
232:70dce7da266c 236:c4bab56944e8
5 5
6 name: skip_execz_flat 6 name: skip_execz_flat
7 body: | 7 body: |
8 ; CHECK-LABEL: name: skip_execz_flat 8 ; CHECK-LABEL: name: skip_execz_flat
9 ; CHECK: bb.0: 9 ; CHECK: bb.0:
10 ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) 10 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
11 ; CHECK: S_CBRANCH_EXECZ %bb.2, implicit $exec 11 ; CHECK-NEXT: {{ $}}
12 ; CHECK: bb.1: 12 ; CHECK-NEXT: S_CBRANCH_EXECZ %bb.2, implicit $exec
13 ; CHECK: successors: %bb.2(0x80000000) 13 ; CHECK-NEXT: {{ $}}
14 ; CHECK: $vgpr0 = V_MOV_B32_e32 0, implicit $exec 14 ; CHECK-NEXT: bb.1:
15 ; CHECK: FLAT_STORE_DWORD undef $vgpr1_vgpr2, $vgpr0, 0, 0, implicit $exec, implicit $flat_scr 15 ; CHECK-NEXT: successors: %bb.2(0x80000000)
16 ; CHECK: bb.2: 16 ; CHECK-NEXT: {{ $}}
17 ; CHECK: S_ENDPGM 0 17 ; CHECK-NEXT: $vgpr0 = V_MOV_B32_e32 0, implicit $exec
18 ; CHECK-NEXT: FLAT_STORE_DWORD undef $vgpr1_vgpr2, $vgpr0, 0, 0, implicit $exec, implicit $flat_scr
19 ; CHECK-NEXT: {{ $}}
20 ; CHECK-NEXT: bb.2:
21 ; CHECK-NEXT: S_ENDPGM 0
18 bb.0: 22 bb.0:
19 successors: %bb.1, %bb.2 23 successors: %bb.1, %bb.2
20 S_CBRANCH_EXECZ %bb.2, implicit $exec 24 S_CBRANCH_EXECZ %bb.2, implicit $exec
21 25
22 bb.1: 26 bb.1:
32 36
33 name: skip_execz_mubuf 37 name: skip_execz_mubuf
34 body: | 38 body: |
35 ; CHECK-LABEL: name: skip_execz_mubuf 39 ; CHECK-LABEL: name: skip_execz_mubuf
36 ; CHECK: bb.0: 40 ; CHECK: bb.0:
37 ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) 41 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
38 ; CHECK: S_CBRANCH_EXECZ %bb.2, implicit $exec 42 ; CHECK-NEXT: {{ $}}
39 ; CHECK: bb.1: 43 ; CHECK-NEXT: S_CBRANCH_EXECZ %bb.2, implicit $exec
40 ; CHECK: successors: %bb.2(0x80000000) 44 ; CHECK-NEXT: {{ $}}
41 ; CHECK: $vgpr0 = V_MOV_B32_e32 0, implicit $exec 45 ; CHECK-NEXT: bb.1:
42 ; CHECK: BUFFER_STORE_DWORD_OFFSET $vgpr0, undef $sgpr0_sgpr1_sgpr2_sgpr3, undef $sgpr4, 0, 0, 0, 0, implicit $exec 46 ; CHECK-NEXT: successors: %bb.2(0x80000000)
43 ; CHECK: bb.2: 47 ; CHECK-NEXT: {{ $}}
44 ; CHECK: S_ENDPGM 0 48 ; CHECK-NEXT: $vgpr0 = V_MOV_B32_e32 0, implicit $exec
49 ; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET $vgpr0, undef $sgpr0_sgpr1_sgpr2_sgpr3, undef $sgpr4, 0, 0, 0, 0, implicit $exec
50 ; CHECK-NEXT: {{ $}}
51 ; CHECK-NEXT: bb.2:
52 ; CHECK-NEXT: S_ENDPGM 0
45 bb.0: 53 bb.0:
46 successors: %bb.1, %bb.2 54 successors: %bb.1, %bb.2
47 S_CBRANCH_EXECZ %bb.2, implicit $exec 55 S_CBRANCH_EXECZ %bb.2, implicit $exec
48 56
49 bb.1: 57 bb.1:
59 67
60 name: skip_execz_ds 68 name: skip_execz_ds
61 body: | 69 body: |
62 ; CHECK-LABEL: name: skip_execz_ds 70 ; CHECK-LABEL: name: skip_execz_ds
63 ; CHECK: bb.0: 71 ; CHECK: bb.0:
64 ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) 72 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
65 ; CHECK: S_CBRANCH_EXECZ %bb.2, implicit $exec 73 ; CHECK-NEXT: {{ $}}
66 ; CHECK: bb.1: 74 ; CHECK-NEXT: S_CBRANCH_EXECZ %bb.2, implicit $exec
67 ; CHECK: successors: %bb.2(0x80000000) 75 ; CHECK-NEXT: {{ $}}
68 ; CHECK: $vgpr0 = V_MOV_B32_e32 0, implicit $exec 76 ; CHECK-NEXT: bb.1:
69 ; CHECK: DS_WRITE_B32 $vgpr0, $vgpr0, 0, 0, implicit $m0, implicit $exec 77 ; CHECK-NEXT: successors: %bb.2(0x80000000)
70 ; CHECK: bb.2: 78 ; CHECK-NEXT: {{ $}}
71 ; CHECK: S_ENDPGM 0 79 ; CHECK-NEXT: $vgpr0 = V_MOV_B32_e32 0, implicit $exec
80 ; CHECK-NEXT: DS_WRITE_B32 $vgpr0, $vgpr0, 0, 0, implicit $m0, implicit $exec
81 ; CHECK-NEXT: {{ $}}
82 ; CHECK-NEXT: bb.2:
83 ; CHECK-NEXT: S_ENDPGM 0
72 bb.0: 84 bb.0:
73 successors: %bb.1, %bb.2 85 successors: %bb.1, %bb.2
74 S_CBRANCH_EXECZ %bb.2, implicit $exec 86 S_CBRANCH_EXECZ %bb.2, implicit $exec
75 87
76 bb.1: 88 bb.1: