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comparison llvm/test/CodeGen/AMDGPU/token-factor-inline-limit-test.ll @ 236:c4bab56944e8 llvm-original

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LLVM 16
author kono
date Wed, 09 Nov 2022 17:45:10 +0900
parents 79ff65ed7e25
children
comparison
equal deleted inserted replaced
232:70dce7da266c 236:c4bab56944e8
2 ; RUN: llc -march=amdgcn -mcpu=gfx900 -combiner-tokenfactor-inline-limit=7 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GCN-TFIL7 %s 2 ; RUN: llc -march=amdgcn -mcpu=gfx900 -combiner-tokenfactor-inline-limit=7 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GCN-TFIL7 %s
3 3
4 4
5 ; GCN-LABEL: {{^}}token_factor_inline_limit_test: 5 ; GCN-LABEL: {{^}}token_factor_inline_limit_test:
6 6
7 ; GCN-TFLID: v_mov_b32_e32 [[REG7:v[0-9]+]], 7
8 ; GCN-TFLID: buffer_store_dword [[REG7]], {{.*$}}
7 ; GCN-TFILD: v_mov_b32_e32 [[REG8:v[0-9]+]], 8 9 ; GCN-TFILD: v_mov_b32_e32 [[REG8:v[0-9]+]], 8
8 ; GCN-TFILD: buffer_store_dword [[REG8]], {{.*$}} 10 ; GCN-TFILD: buffer_store_dword [[REG8]], {{.*}} offset:4
9 ; GCN-TFILD: v_mov_b32_e32 [[REG9:v[0-9]+]], 9 11 ; GCN-TFILD: v_mov_b32_e32 [[REG9:v[0-9]+]], 9
10 ; GCN-TFILD: buffer_store_dword [[REG9]], {{.*}} offset:4 12 ; GCN-TFILD: buffer_store_dword [[REG9]], {{.*}} offset:8
11 ; GCN-TFILD: v_mov_b32_e32 [[REG10:v[0-9]+]], 10 13 ; GCN-TFILD: v_mov_b32_e32 [[REG10:v[0-9]+]], 10
12 ; GCN-TFILD: buffer_store_dword [[REG10]], {{.*}} offset:8 14 ; GCN-TFILD: buffer_store_dword [[REG10]], {{.*}} offset:12
13 ; GCN-TFILD: v_mov_b32_e32 [[REG11:v[0-9]+]], 11 15 ; GCN-TFILD: v_mov_b32_e32 [[REG11:v[0-9]+]], 11
14 ; GCN-TFILD: buffer_store_dword [[REG11]], {{.*}} offset:12 16 ; GCN-TFILD: buffer_store_dword [[REG11]], {{.*}} offset:16
15 ; GCN-TFILD: v_mov_b32_e32 [[REG12:v[0-9]+]], 12 17 ; GCN-TFILD: v_mov_b32_e32 [[REG12:v[0-9]+]], 12
16 ; GCN-TFILD: buffer_store_dword [[REG12]], {{.*}} offset:16 18 ; GCN-TFILD: buffer_store_dword [[REG12]], {{.*}} offset:20
17 ; GCN-TFILD: v_mov_b32_e32 [[REG13:v[0-9]+]], 13 19 ; GCN-TFILD: v_mov_b32_e32 [[REG13:v[0-9]+]], 13
18 ; GCN-TFILD: buffer_store_dword [[REG13]], {{.*}} offset:20 20 ; GCN-TFILD: buffer_store_dword [[REG13]], {{.*}} offset:24
19 ; GCN-TFILD: v_mov_b32_e32 [[REG14:v[0-9]+]], 14 21 ; GCN-TFILD: v_mov_b32_e32 [[REG14:v[0-9]+]], 14
20 ; GCN-TFILD: buffer_store_dword [[REG14]], {{.*}} offset:24 22 ; GCN-TFILD: buffer_store_dword [[REG14]], {{.*}} offset:28
21 ; GCN-TFILD: v_mov_b32_e32 [[REG15:v[0-9]+]], 15 23 ; GCN-TFILD: v_mov_b32_e32 [[REG15:v[0-9]+]], 15
22 ; GCN-TFILD: buffer_store_dword [[REG15]], {{.*}} offset:28 24 ; GCN-TFILD: buffer_store_dword [[REG15]], {{.*}} offset:32
23 25
24 ; GCN-TFIL7: v_mov_b32_e32 [[REG15:v[0-9]+]], 15 26 ; GCN-TFIL7: v_mov_b32_e32 [[REG15:v[0-9]+]], 15
25 ; GCN-TFIL7: buffer_store_dword [[REG15]], {{.*}} offset:28 27 ; GCN-TFIL7: buffer_store_dword [[REG15]], {{.*}} offset:32
26 ; GCN-TFIL7: v_mov_b32_e32 [[REG14:v[0-9]+]], 14 28 ; GCN-TFIL7: v_mov_b32_e32 [[REG14:v[0-9]+]], 14
27 ; GCN-TFIL7: buffer_store_dword [[REG14]], {{.*}} offset:24 29 ; GCN-TFIL7: buffer_store_dword [[REG14]], {{.*}} offset:28
28 ; GCN-TFIL7: v_mov_b32_e32 [[REG13:v[0-9]+]], 13 30 ; GCN-TFIL7: v_mov_b32_e32 [[REG13:v[0-9]+]], 13
29 ; GCN-TFIL7: buffer_store_dword [[REG13]], {{.*}} offset:20 31 ; GCN-TFIL7: buffer_store_dword [[REG13]], {{.*}} offset:24
30 ; GCN-TFIL7: v_mov_b32_e32 [[REG12:v[0-9]+]], 12 32 ; GCN-TFIL7: v_mov_b32_e32 [[REG12:v[0-9]+]], 12
31 ; GCN-TFIL7: buffer_store_dword [[REG12]], {{.*}} offset:16 33 ; GCN-TFIL7: buffer_store_dword [[REG12]], {{.*}} offset:20
32 ; GCN-TFIL7: v_mov_b32_e32 [[REG11:v[0-9]+]], 11 34 ; GCN-TFIL7: v_mov_b32_e32 [[REG11:v[0-9]+]], 11
33 ; GCN-TFIL7: buffer_store_dword [[REG11]], {{.*}} offset:12 35 ; GCN-TFIL7: buffer_store_dword [[REG11]], {{.*}} offset:16
34 ; GCN-TFIL7: v_mov_b32_e32 [[REG10:v[0-9]+]], 10 36 ; GCN-TFIL7: v_mov_b32_e32 [[REG10:v[0-9]+]], 10
35 ; GCN-TFIL7: buffer_store_dword [[REG10]], {{.*}} offset:8 37 ; GCN-TFIL7: buffer_store_dword [[REG10]], {{.*}} offset:12
36 ; GCN-TFIL7: v_mov_b32_e32 [[REG9:v[0-9]+]], 9 38 ; GCN-TFIL7: v_mov_b32_e32 [[REG9:v[0-9]+]], 9
37 ; GCN-TFIL7: buffer_store_dword [[REG9]], {{.*}} offset:4 39 ; GCN-TFIL7: buffer_store_dword [[REG9]], {{.*}} offset:8
38 ; GCN-TFIL7: v_mov_b32_e32 [[REG8:v[0-9]+]], 8 40 ; GCN-TFIL7: v_mov_b32_e32 [[REG8:v[0-9]+]], 8
39 ; GCN-TFIL7: buffer_store_dword [[REG8]], {{.*$}} 41 ; GCN-TFIL7: buffer_store_dword [[REG8]], {{.*}} offset:4
42 ; GCN-TFLL7: v_mov_b32_e32 [[REG7:v[0-9]+]], 7
43 ; GCN-TFLL7: buffer_store_dword [[REG7]], {{.*$}}
40 44
41 ; GCN: v_mov_b32_e32 v31, 7
42 ; GCN: s_getpc 45 ; GCN: s_getpc
43 define void @token_factor_inline_limit_test() { 46 define void @token_factor_inline_limit_test() {
44 entry: 47 entry:
45 call void @external_void_func_8xv5i32( 48 call void @external_void_func_8xv5i32(
46 <5 x i32><i32 0, i32 0, i32 0, i32 0, i32 0>, 49 <5 x i32><i32 0, i32 0, i32 0, i32 0, i32 0>,