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diff llvm/test/TableGen/AsmPredicateCondsEmission.td @ 173:0572611fdcc8 llvm10 llvm12

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reorgnization done
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Mon, 25 May 2020 11:55:54 +0900
parents 1d019706d866
children
line wrap: on
line diff
--- a/llvm/test/TableGen/AsmPredicateCondsEmission.td	Mon May 25 11:50:15 2020 +0900
+++ b/llvm/test/TableGen/AsmPredicateCondsEmission.td	Mon May 25 11:55:54 2020 +0900
@@ -12,9 +12,10 @@
   let InstructionSet = archInstrInfo;
 }
 
+def AssemblerCondition2 : SubtargetFeature<"cond2", "cond2", "true", "">;
 def Pred1 : Predicate<"Condition1">;
 def Pred2 : Predicate<"Condition2">,
-            AssemblerPredicate<"AssemblerCondition2">;
+            AssemblerPredicate<(all_of AssemblerCondition2)>;
 
 def foo : Instruction {
   let Size = 2;