--- a/lib/Target/ARM/ARMScheduleA8.td	Tue Jan 26 22:56:36 2016 +0900
+++ b/lib/Target/ARM/ARMScheduleA8.td	Fri Nov 25 19:14:25 2016 +0900
@@ -1065,11 +1065,11 @@
 // Cortex-A8 machine model for scheduling and other instruction cost heuristics.
 def CortexA8Model : SchedMachineModel {
   let IssueWidth = 2; // 2 micro-ops are dispatched per cycle.
-  let MinLatency = -1; // OperandCycles are interpreted as MinLatency.
   let LoadLatency = 2; // Optimistic load latency assuming bypass.
                        // This is overriden by OperandCycles if the
                        // Itineraries are queried instead.
   let MispredictPenalty = 13; // Based on estimate of pipeline depth.
+  let CompleteModel = 0;
 
   let Itineraries = CortexA8Itineraries;
 }