--- a/test/Transforms/InstCombine/and-compare.ll	Tue Jan 26 22:56:36 2016 +0900
+++ b/test/Transforms/InstCombine/and-compare.ll	Fri Nov 25 19:14:25 2016 +0900
@@ -1,5 +1,5 @@
-; RUN: opt < %s -instcombine -S | \
-; RUN: FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -instcombine -S | FileCheck %s
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
@@ -7,32 +7,71 @@
 ; Should be optimized to one and.
 define i1 @test1(i32 %a, i32 %b) {
 ; CHECK-LABEL: @test1(
-; CHECK-NEXT: %1 = xor i32 %a, %b
-; CHECK-NEXT: %2 = and i32 %1, 65280
-; CHECK-NEXT: %tmp = icmp ne i32 %2, 0
-; CHECK-NEXT: ret i1 %tmp
-        %tmp1 = and i32 %a, 65280               ; <i32> [#uses=1]
-        %tmp3 = and i32 %b, 65280               ; <i32> [#uses=1]
-        %tmp = icmp ne i32 %tmp1, %tmp3         ; <i1> [#uses=1]
-        ret i1 %tmp
+; CHECK-NEXT:    [[TMP1:%.*]] = xor i32 %a, %b
+; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[TMP1]], 65280
+; CHECK-NEXT:    [[TMP:%.*]] = icmp ne i32 [[TMP2]], 0
+; CHECK-NEXT:    ret i1 [[TMP]]
+;
+  %tmp1 = and i32 %a, 65280
+  %tmp3 = and i32 %b, 65280
+  %tmp = icmp ne i32 %tmp1, %tmp3
+  ret i1 %tmp
 }
 
-define zeroext i1 @test2(i64 %A) {
+define <2 x i1> @test1vec(<2 x i32> %a, <2 x i32> %b) {
+; CHECK-LABEL: @test1vec(
+; CHECK-NEXT:    [[TMP1:%.*]] = xor <2 x i32> %a, %b
+; CHECK-NEXT:    [[TMP2:%.*]] = and <2 x i32> [[TMP1]], <i32 65280, i32 65280>
+; CHECK-NEXT:    [[TMP:%.*]] = icmp ne <2 x i32> [[TMP2]], zeroinitializer
+; CHECK-NEXT:    ret <2 x i1> [[TMP]]
+;
+  %tmp1 = and <2 x i32> %a, <i32 65280, i32 65280>
+  %tmp3 = and <2 x i32> %b, <i32 65280, i32 65280>
+  %tmp = icmp ne <2 x i32> %tmp1, %tmp3
+  ret <2 x i1> %tmp
+}
+
+define i1 @test2(i64 %A) {
 ; CHECK-LABEL: @test2(
-; CHECK-NEXT: %[[trunc:.*]] = trunc i64 %A to i8
-; CHECK-NEXT: %[[icmp:.*]] = icmp sgt i8 %[[trunc]], -1
-; CHECK-NEXT: ret i1 %[[icmp]]
+; CHECK-NEXT:    [[TMP1:%.*]] = trunc i64 %A to i8
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i8 [[TMP1]], -1
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
   %and = and i64 %A, 128
   %cmp = icmp eq i64 %and, 0
   ret i1 %cmp
 }
 
-define zeroext i1 @test3(i64 %A) {
+define <2 x i1> @test2vec(<2 x i64> %A) {
+; CHECK-LABEL: @test2vec(
+; CHECK-NEXT:    [[TMP1:%.*]] = trunc <2 x i64> %A to <2 x i8>
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <2 x i8> [[TMP1]], <i8 -1, i8 -1>
+; CHECK-NEXT:    ret <2 x i1> [[CMP]]
+;
+  %and = and <2 x i64> %A, <i64 128, i64 128>
+  %cmp = icmp eq <2 x i64> %and, zeroinitializer
+  ret <2 x i1> %cmp
+}
+
+define i1 @test3(i64 %A) {
 ; CHECK-LABEL: @test3(
-; CHECK-NEXT: %[[trunc:.*]] = trunc i64 %A to i8
-; CHECK-NEXT: %[[icmp:.*]] = icmp slt i8 %[[trunc]], 0
-; CHECK-NEXT: ret i1 %[[icmp]]
+; CHECK-NEXT:    [[TMP1:%.*]] = trunc i64 %A to i8
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 [[TMP1]], 0
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
   %and = and i64 %A, 128
   %cmp = icmp ne i64 %and, 0
   ret i1 %cmp
 }
+
+define <2 x i1> @test3vec(<2 x i64> %A) {
+; CHECK-LABEL: @test3vec(
+; CHECK-NEXT:    [[TMP1:%.*]] = trunc <2 x i64> %A to <2 x i8>
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt <2 x i8> [[TMP1]], zeroinitializer
+; CHECK-NEXT:    ret <2 x i1> [[CMP]]
+;
+  %and = and <2 x i64> %A, <i64 128, i64 128>
+  %cmp = icmp ne <2 x i64> %and, zeroinitializer
+  ret <2 x i1> %cmp
+}
+