diff llvm/lib/Target/Hexagon/HexagonDepArch.h @ 252:1f2b6ac9f198 llvm-original

LLVM16-1
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Fri, 18 Aug 2023 09:04:13 +0900
parents c4bab56944e8
children
line wrap: on
line diff
--- a/llvm/lib/Target/Hexagon/HexagonDepArch.h	Wed Nov 09 17:47:54 2022 +0900
+++ b/llvm/lib/Target/Hexagon/HexagonDepArch.h	Fri Aug 18 09:04:13 2023 +0900
@@ -5,21 +5,33 @@
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
-// Automatically generated file, do not edit!
-//===----------------------------------------------------------------------===//
-
 
 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONDEPARCH_H
 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONDEPARCH_H
 
 #include "llvm/ADT/StringSwitch.h"
+#include <optional>
 
 namespace llvm {
 namespace Hexagon {
-enum class ArchEnum { NoArch, Generic, V5, V55, V60, V62, V65, V66, V67, V68, V69 };
+enum class ArchEnum {
+  NoArch,
+  Generic,
+  V5,
+  V55,
+  V60,
+  V62,
+  V65,
+  V66,
+  V67,
+  V68,
+  V69,
+  V71,
+  V73
+};
 
-inline Optional<Hexagon::ArchEnum> getCpu(StringRef CPU) {
-  return StringSwitch<Optional<Hexagon::ArchEnum>>(CPU)
+inline std::optional<Hexagon::ArchEnum> getCpu(StringRef CPU) {
+  return StringSwitch<std::optional<Hexagon::ArchEnum>>(CPU)
       .Case("generic", Hexagon::ArchEnum::V5)
       .Case("hexagonv5", Hexagon::ArchEnum::V5)
       .Case("hexagonv55", Hexagon::ArchEnum::V55)
@@ -31,7 +43,10 @@
       .Case("hexagonv67t", Hexagon::ArchEnum::V67)
       .Case("hexagonv68", Hexagon::ArchEnum::V68)
       .Case("hexagonv69", Hexagon::ArchEnum::V69)
-      .Default(None);
+      .Case("hexagonv71", Hexagon::ArchEnum::V71)
+      .Case("hexagonv71t", Hexagon::ArchEnum::V71)
+      .Case("hexagonv73", Hexagon::ArchEnum::V73)
+      .Default(std::nullopt);
 }
 } // namespace Hexagon
 } // namespace llvm