--- a/llvm/test/CodeGen/AMDGPU/local-memory.ll	Wed Nov 09 17:47:54 2022 +0900
+++ b/llvm/test/CodeGen/AMDGPU/local-memory.ll	Fri Aug 18 09:04:13 2023 +0900
@@ -14,12 +14,12 @@
 ; GCN: ds_read_b32 v{{[0-9]+}}, v[[PTR]] offset:4
 
 ; R600: LDS_READ_RET
-define amdgpu_kernel void @load_i32_local_const_ptr(i32 addrspace(1)* %out, i32 addrspace(3)* %in) #0 {
+define amdgpu_kernel void @load_i32_local_const_ptr(ptr addrspace(1) %out, ptr addrspace(3) %in) #0 {
 entry:
-  %tmp0 = getelementptr [512 x i32], [512 x i32] addrspace(3)* @lds, i32 0, i32 1
-  %tmp1 = load i32, i32 addrspace(3)* %tmp0
-  %tmp2 = getelementptr i32, i32 addrspace(1)* %out, i32 1
-  store i32 %tmp1, i32 addrspace(1)* %tmp2
+  %tmp0 = getelementptr [512 x i32], ptr addrspace(3) @lds, i32 0, i32 1
+  %tmp1 = load i32, ptr addrspace(3) %tmp0
+  %tmp2 = getelementptr i32, ptr addrspace(1) %out, i32 1
+  store i32 %tmp1, ptr addrspace(1) %tmp2
   ret void
 }
 
@@ -30,14 +30,13 @@
 ; R600: LDS_READ_RET
 ; GCN-DAG: ds_read_b32
 ; GCN-DAG: ds_read2_b32
-define amdgpu_kernel void @load_i32_v2i32_local(<2 x i32> addrspace(1)* %out, i32 addrspace(3)* %in) #0 {
-  %scalar = load i32, i32 addrspace(3)* %in
-  %tmp0 = bitcast i32 addrspace(3)* %in to <2 x i32> addrspace(3)*
-  %vec_ptr = getelementptr <2 x i32>, <2 x i32> addrspace(3)* %tmp0, i32 2
-  %vec0 = load <2 x i32>, <2 x i32> addrspace(3)* %vec_ptr, align 4
+define amdgpu_kernel void @load_i32_v2i32_local(ptr addrspace(1) %out, ptr addrspace(3) %in) #0 {
+  %scalar = load i32, ptr addrspace(3) %in
+  %vec_ptr = getelementptr <2 x i32>, ptr addrspace(3) %in, i32 2
+  %vec0 = load <2 x i32>, ptr addrspace(3) %vec_ptr, align 4
   %vec1 = insertelement <2 x i32> <i32 0, i32 0>, i32 %scalar, i32 0
   %vec = add <2 x i32> %vec0, %vec1
-  store <2 x i32> %vec, <2 x i32> addrspace(1)* %out
+  store <2 x i32> %vec, ptr addrspace(1) %out
   ret void
 }