diff llvm/test/CodeGen/AMDGPU/promote-alloca-addrspacecast.ll @ 252:1f2b6ac9f198 llvm-original

LLVM16-1
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Fri, 18 Aug 2023 09:04:13 +0900
parents 1d019706d866
children
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--- a/llvm/test/CodeGen/AMDGPU/promote-alloca-addrspacecast.ll	Wed Nov 09 17:47:54 2022 +0900
+++ b/llvm/test/CodeGen/AMDGPU/promote-alloca-addrspacecast.ll	Fri Aug 18 09:04:13 2023 +0900
@@ -1,19 +1,17 @@
-; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri -amdgpu-promote-alloca < %s | FileCheck %s
+; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri -passes=amdgpu-promote-alloca < %s | FileCheck %s
 
 ; The types of the users of the addrspacecast should not be changed.
 
 ; CHECK-LABEL: @invalid_bitcast_addrspace(
-; CHECK: getelementptr inbounds [256 x [1 x i32]], [256 x [1 x i32]] addrspace(3)* @invalid_bitcast_addrspace.data, i32 0, i32 %14
-; CHECK: bitcast [1 x i32] addrspace(3)* %{{[0-9]+}} to half addrspace(3)*
-; CHECK: addrspacecast half addrspace(3)* %tmp to half addrspace(4)*
-; CHECK: bitcast half addrspace(4)* %tmp1 to <2 x i16> addrspace(4)*
+; CHECK: [[GEP:%[0-9]+]] = getelementptr inbounds [256 x [1 x i32]], ptr addrspace(3) @invalid_bitcast_addrspace.data, i32 0, i32 %{{[0-9]+}}
+; CHECK: [[ASC:%[a-z0-9]+]] = addrspacecast ptr addrspace(3) [[GEP]] to ptr
+; CHECK: [[LOAD:%[a-z0-9]+]] = load <2 x i16>, ptr [[ASC]]
+; CHECK: bitcast <2 x i16> [[LOAD]] to <2 x half>
 define amdgpu_kernel void @invalid_bitcast_addrspace() #0 {
 entry:
-  %data = alloca [1 x i32], align 4
-  %tmp = bitcast [1 x i32]* %data to half*
-  %tmp1 = addrspacecast half* %tmp to half addrspace(4)*
-  %tmp2 = bitcast half addrspace(4)* %tmp1 to <2 x i16> addrspace(4)*
-  %tmp3 = load <2 x i16>, <2 x i16> addrspace(4)* %tmp2, align 2
+  %data = alloca [1 x i32], addrspace(5)
+  %tmp1 = addrspacecast ptr addrspace(5) %data to ptr
+  %tmp3 = load <2 x i16>, ptr %tmp1, align 2
   %tmp4 = bitcast <2 x i16> %tmp3 to <2 x half>
   ret void
 }