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diff lib/Target/ARM/ARMScheduleA57.td @ 134:3a76565eade5 LLVM5.0.1

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update 5.0.1
author mir3636
date Sat, 17 Feb 2018 09:57:20 +0900
parents 803732b1fca8
children c2174574ed3a
line wrap: on
line diff
--- a/lib/Target/ARM/ARMScheduleA57.td	Fri Feb 16 19:10:49 2018 +0900
+++ b/lib/Target/ARM/ARMScheduleA57.td	Sat Feb 17 09:57:20 2018 +0900
@@ -971,9 +971,9 @@
 def : InstRW<[A57Write_3cyc_1V], (instregex "VABDL(s|u)")>;
 
 // ASIMD arith, basic
-def : InstRW<[A57Write_3cyc_1V], (instregex "VADD", "VADDL", "VADDW",
+def : InstRW<[A57Write_3cyc_1V], (instregex "VADDv", "VADDL", "VADDW",
   "VNEG(s8d|s16d|s32d|s8q|s16q|s32q|d|q)",
-  "VPADDi", "VPADDL", "VSUB", "VSUBL", "VSUBW")>;
+  "VPADDi", "VPADDL", "VSUBv", "VSUBL", "VSUBW")>;
 
 // ASIMD arith, complex
 def : InstRW<[A57Write_3cyc_1V], (instregex "VABS", "VADDHN", "VHADD", "VHSUB",