Mercurial > hg > CbC > CbC_llvm
diff test/CodeGen/AArch64/arm64-st1.ll @ 134:3a76565eade5 LLVM5.0.1
update 5.0.1
author | mir3636 |
---|---|
date | Sat, 17 Feb 2018 09:57:20 +0900 |
parents | 1172e4bd9c6f |
children | c2174574ed3a |
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--- a/test/CodeGen/AArch64/arm64-st1.ll Fri Feb 16 19:10:49 2018 +0900 +++ b/test/CodeGen/AArch64/arm64-st1.ll Sat Feb 17 09:57:20 2018 +0900 @@ -1,4 +1,6 @@ ; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple -verify-machineinstrs -mcpu=exynos-m1 | FileCheck --check-prefix=EXYNOS %s +; The instruction latencies of Exynos-M1 trigger the transform we see under the Exynos check. define void @st1lane_16b(<16 x i8> %A, i8* %D) { ; CHECK-LABEL: st1lane_16b @@ -375,6 +377,10 @@ define void @st2_8b(<8 x i8> %A, <8 x i8> %B, i8* %P) nounwind { ; CHECK-LABEL: st2_8b ; CHECK: st2.8b +; EXYNOS-LABEL: st2_8b +; EXYNOS: zip1.8b +; EXYNOS: zip2.8b +; EXYNOS: stp call void @llvm.aarch64.neon.st2.v8i8.p0i8(<8 x i8> %A, <8 x i8> %B, i8* %P) ret void } @@ -389,6 +395,17 @@ define void @st4_8b(<8 x i8> %A, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i8* %P) nounwind { ; CHECK-LABEL: st4_8b ; CHECK: st4.8b +; EXYNOS-LABEL: st4_8b +; EXYNOS: zip1.8b +; EXYNOS: zip2.8b +; EXYNOS: zip1.8b +; EXYNOS: zip2.8b +; EXYNOS: zip1.8b +; EXYNOS: zip2.8b +; EXYNOS: stp +; EXYNOS: zip1.8b +; EXYNOS: zip2.8b +; EXYNOS: stp call void @llvm.aarch64.neon.st4.v8i8.p0i8(<8 x i8> %A, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i8* %P) ret void } @@ -400,6 +417,10 @@ define void @st2_16b(<16 x i8> %A, <16 x i8> %B, i8* %P) nounwind { ; CHECK-LABEL: st2_16b ; CHECK: st2.16b +; EXYNOS-LABEL: st2_16b +; EXYNOS: zip1.16b +; EXYNOS: zip2.16b +; EXYNOS: stp call void @llvm.aarch64.neon.st2.v16i8.p0i8(<16 x i8> %A, <16 x i8> %B, i8* %P) ret void } @@ -414,6 +435,17 @@ define void @st4_16b(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i8* %P) nounwind { ; CHECK-LABEL: st4_16b ; CHECK: st4.16b +; EXYNOS-LABEL: st4_16b +; EXYNOS: zip1.16b +; EXYNOS: zip2.16b +; EXYNOS: zip1.16b +; EXYNOS: zip2.16b +; EXYNOS: zip1.16b +; EXYNOS: zip2.16b +; EXYNOS: stp +; EXYNOS: zip1.16b +; EXYNOS: zip2.16b +; EXYNOS: stp call void @llvm.aarch64.neon.st4.v16i8.p0i8(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i8* %P) ret void } @@ -425,6 +457,10 @@ define void @st2_4h(<4 x i16> %A, <4 x i16> %B, i16* %P) nounwind { ; CHECK-LABEL: st2_4h ; CHECK: st2.4h +; EXYNOS-LABEL: st2_4h +; EXYNOS: zip1.4h +; EXYNOS: zip2.4h +; EXYNOS: stp call void @llvm.aarch64.neon.st2.v4i16.p0i16(<4 x i16> %A, <4 x i16> %B, i16* %P) ret void } @@ -439,6 +475,17 @@ define void @st4_4h(<4 x i16> %A, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i16* %P) nounwind { ; CHECK-LABEL: st4_4h ; CHECK: st4.4h +; EXYNOS-LABEL: st4_4h +; EXYNOS: zip1.4h +; EXYNOS: zip2.4h +; EXYNOS: zip1.4h +; EXYNOS: zip2.4h +; EXYNOS: zip1.4h +; EXYNOS: zip2.4h +; EXYNOS: stp +; EXYNOS: zip1.4h +; EXYNOS: zip2.4h +; EXYNOS: stp call void @llvm.aarch64.neon.st4.v4i16.p0i16(<4 x i16> %A, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i16* %P) ret void } @@ -450,6 +497,10 @@ define void @st2_8h(<8 x i16> %A, <8 x i16> %B, i16* %P) nounwind { ; CHECK-LABEL: st2_8h ; CHECK: st2.8h +; EXYNOS-LABEL: st2_8h +; EXYNOS: zip1.8h +; EXYNOS: zip2.8h +; EXYNOS: stp call void @llvm.aarch64.neon.st2.v8i16.p0i16(<8 x i16> %A, <8 x i16> %B, i16* %P) ret void } @@ -464,6 +515,17 @@ define void @st4_8h(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i16* %P) nounwind { ; CHECK-LABEL: st4_8h ; CHECK: st4.8h +; EXYNOS-LABEL: st4_8h +; EXYNOS: zip1.8h +; EXYNOS: zip2.8h +; EXYNOS: zip1.8h +; EXYNOS: zip2.8h +; EXYNOS: zip1.8h +; EXYNOS: zip2.8h +; EXYNOS: stp +; EXYNOS: zip1.8h +; EXYNOS: zip2.8h +; EXYNOS: stp call void @llvm.aarch64.neon.st4.v8i16.p0i16(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i16* %P) ret void } @@ -475,6 +537,10 @@ define void @st2_2s(<2 x i32> %A, <2 x i32> %B, i32* %P) nounwind { ; CHECK-LABEL: st2_2s ; CHECK: st2.2s +; EXYNOS-LABEL: st2_2s +; EXYNOS: zip1.2s +; EXYNOS: zip2.2s +; EXYNOS: stp call void @llvm.aarch64.neon.st2.v2i32.p0i32(<2 x i32> %A, <2 x i32> %B, i32* %P) ret void } @@ -489,6 +555,17 @@ define void @st4_2s(<2 x i32> %A, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i32* %P) nounwind { ; CHECK-LABEL: st4_2s ; CHECK: st4.2s +; EXYNOS-LABEL: st4_2s +; EXYNOS: zip1.2s +; EXYNOS: zip2.2s +; EXYNOS: zip1.2s +; EXYNOS: zip2.2s +; EXYNOS: zip1.2s +; EXYNOS: zip2.2s +; EXYNOS: stp +; EXYNOS: zip1.2s +; EXYNOS: zip2.2s +; EXYNOS: stp call void @llvm.aarch64.neon.st4.v2i32.p0i32(<2 x i32> %A, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i32* %P) ret void } @@ -500,6 +577,10 @@ define void @st2_4s(<4 x i32> %A, <4 x i32> %B, i32* %P) nounwind { ; CHECK-LABEL: st2_4s ; CHECK: st2.4s +; EXYNOS-LABEL: st2_4s +; EXYNOS: zip1.4s +; EXYNOS: zip2.4s +; EXYNOS: stp call void @llvm.aarch64.neon.st2.v4i32.p0i32(<4 x i32> %A, <4 x i32> %B, i32* %P) ret void } @@ -514,6 +595,17 @@ define void @st4_4s(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i32* %P) nounwind { ; CHECK-LABEL: st4_4s ; CHECK: st4.4s +; EXYNOS-LABEL: st4_4s +; EXYNOS: zip1.4s +; EXYNOS: zip2.4s +; EXYNOS: zip1.4s +; EXYNOS: zip2.4s +; EXYNOS: zip1.4s +; EXYNOS: zip2.4s +; EXYNOS: stp +; EXYNOS: zip1.4s +; EXYNOS: zip2.4s +; EXYNOS: stp call void @llvm.aarch64.neon.st4.v4i32.p0i32(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i32* %P) ret void } @@ -551,6 +643,10 @@ define void @st2_2d(<2 x i64> %A, <2 x i64> %B, i64* %P) nounwind { ; CHECK-LABEL: st2_2d ; CHECK: st2.2d +; EXYNOS-LABEL: st2_2d +; EXYNOS: zip1.2d +; EXYNOS: zip2.2d +; EXYNOS: stp call void @llvm.aarch64.neon.st2.v2i64.p0i64(<2 x i64> %A, <2 x i64> %B, i64* %P) ret void } @@ -565,6 +661,17 @@ define void @st4_2d(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64* %P) nounwind { ; CHECK-LABEL: st4_2d ; CHECK: st4.2d +; EXYNOS-LABEL: st4_2d +; EXYNOS: zip1.2d +; EXYNOS: zip2.2d +; EXYNOS: zip1.2d +; EXYNOS: zip2.2d +; EXYNOS: zip1.2d +; EXYNOS: zip2.2d +; EXYNOS: stp +; EXYNOS: zip1.2d +; EXYNOS: zip2.2d +; EXYNOS: stp call void @llvm.aarch64.neon.st4.v2i64.p0i64(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64* %P) ret void }