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diff test/CodeGen/Mips/llvm-ir/not.ll @ 134:3a76565eade5 LLVM5.0.1

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update 5.0.1
author mir3636
date Sat, 17 Feb 2018 09:57:20 +0900
parents 803732b1fca8
children c2174574ed3a
line wrap: on
line diff
--- a/test/CodeGen/Mips/llvm-ir/not.ll	Fri Feb 16 19:10:49 2018 +0900
+++ b/test/CodeGen/Mips/llvm-ir/not.ll	Sat Feb 17 09:57:20 2018 +0900
@@ -26,8 +26,6 @@
 ; RUN:    -check-prefixes=ALL,MM,MM32
 ; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \
 ; RUN:    -check-prefixes=ALL,MM,MM32
-; RUN: llc < %s -march=mips -mcpu=mips64r6 -target-abi n64 -mattr=+micromips | FileCheck %s \
-; RUN:    -check-prefixes=ALL,MM,MM64
 
 define signext i1 @not_i1(i1 signext %a) {
 entry:
@@ -98,9 +96,6 @@
   ; MM32:         not16   $2, $4
   ; MM32:         not16   $3, $5
 
-  ; MM64:         daddiu  $[[T0:[0-9]+]], $zero, -1
-  ; MM64:         xor     $2, $4, $[[T0]]
-
   %r = xor i64 %a, -1
   ret i64 %r
 }
@@ -123,10 +118,6 @@
   ; MM32:         not16   $4, $6
   ; MM32:         not16   $5, $7
 
-  ; MM64:         daddiu  $[[T0:[0-9]+]], $zero, -1
-  ; MM64:         xor     $2, $4, $[[T0]]
-  ; MM64:         xor     $3, $5, $[[T0]]
-
   %r = xor i128 %a, -1
   ret i128 %r
 }
@@ -138,7 +129,6 @@
   ; GP32:         nor     $2, $5, $4
   ; GP64:         or      $1, $5, $4
   ; MM32:         nor     $2, $5, $4
-  ; MM64:         or      $1, $5, $4
 
   %or = or i1 %b, %a
   %r = xor i1 %or, -1
@@ -152,7 +142,6 @@
   ; GP32:         nor     $2, $5, $4
   ; GP64:         or      $1, $5, $4
   ; MM32:         nor     $2, $5, $4
-  ; MM64:         or      $1, $5, $4
 
   %or = or i8 %b, %a
   %r = xor i8 %or, -1
@@ -166,7 +155,6 @@
   ; GP32:         nor     $2, $5, $4
   ; GP64:         or      $1, $5, $4
   ; MM32:         nor     $2, $5, $4
-  ; MM64:         or      $1, $5, $4
 
   %or = or i16 %b, %a
   %r = xor i16 %or, -1
@@ -185,10 +173,6 @@
 
   ; MM32:         nor     $2, $5, $4
 
-  ; MM64:         or      $[[T0:[0-9]+]], $5, $4
-  ; MM64:         sll     $[[T1:[0-9]+]], $[[T0]], 0
-  ; MM64:         not16   $2, $[[T1]]
-
   %or = or i32 %b, %a
   %r = xor i32 %or, -1
   ret i32 %r
@@ -207,8 +191,6 @@
   ; MM32:         nor     $2, $6, $4
   ; MM32:         nor     $3, $7, $5
 
-  ; MM64:         nor     $2, $5, $4
-
   %or = or i64 %b, %a
   %r = xor i64 %or, -1
   ret i64 %r
@@ -239,9 +221,6 @@
   ; MM32:         lw      $[[T3:[0-9]+]], 28($sp)
   ; MM32:         nor     $5, $[[T3]], $7
 
-  ; MM64:         nor     $2, $6, $4
-  ; MM64:         nor     $3, $7, $5
-
   %or = or i128 %b, %a
   %r = xor i128 %or, -1
   ret i128 %r