--- a/test/Transforms/InstCombine/mul.ll	Fri Feb 16 19:10:49 2018 +0900
+++ b/test/Transforms/InstCombine/mul.ll	Sat Feb 17 09:57:20 2018 +0900
@@ -1,168 +1,192 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; This test makes sure that mul instructions are properly eliminated.
 ; RUN: opt < %s -instcombine -S | FileCheck %s
 
-define i32 @test1(i32 %A) {
-; CHECK-LABEL: @test1(
-        %B = mul i32 %A, 1              ; <i32> [#uses=1]
-        ret i32 %B
-; CHECK: ret i32 %A
+define i32 @pow2_multiplier(i32 %A) {
+; CHECK-LABEL: @pow2_multiplier(
+; CHECK-NEXT:    [[B:%.*]] = shl i32 [[A:%.*]], 1
+; CHECK-NEXT:    ret i32 [[B]]
+;
+  %B = mul i32 %A, 2
+  ret i32 %B
 }
 
-define i32 @test2(i32 %A) {
-; CHECK-LABEL: @test2(
-        ; Should convert to an add instruction
-        %B = mul i32 %A, 2              ; <i32> [#uses=1]
-        ret i32 %B
-; CHECK: shl i32 %A, 1
-}
-
-define i32 @test3(i32 %A) {
-; CHECK-LABEL: @test3(
-        ; This should disappear entirely
-        %B = mul i32 %A, 0              ; <i32> [#uses=1]
-        ret i32 %B
-; CHECK: ret i32 0
-}
-
-define double @test4(double %A) {
-; CHECK-LABEL: @test4(
-        ; This is safe for FP
-        %B = fmul double 1.000000e+00, %A                ; <double> [#uses=1]
-        ret double %B
-; CHECK: ret double %A
+define <2 x i32> @pow2_multiplier_vec(<2 x i32> %A) {
+; CHECK-LABEL: @pow2_multiplier_vec(
+; CHECK-NEXT:    [[B:%.*]] = shl <2 x i32> [[A:%.*]], <i32 3, i32 3>
+; CHECK-NEXT:    ret <2 x i32> [[B]]
+;
+  %B = mul <2 x i32> %A, <i32 8, i32 8>
+  ret <2 x i32> %B
 }
 
-define i32 @test5(i32 %A) {
-; CHECK-LABEL: @test5(
-        %B = mul i32 %A, 8              ; <i32> [#uses=1]
-        ret i32 %B
-; CHECK: shl i32 %A, 3
-}
-
-define i8 @test6(i8 %A) {
-; CHECK-LABEL: @test6(
-        %B = mul i8 %A, 8               ; <i8> [#uses=1]
-        %C = mul i8 %B, 8               ; <i8> [#uses=1]
-        ret i8 %C
-; CHECK: shl i8 %A, 6
+define i8 @combine_shl(i8 %A) {
+; CHECK-LABEL: @combine_shl(
+; CHECK-NEXT:    [[C:%.*]] = shl i8 [[A:%.*]], 6
+; CHECK-NEXT:    ret i8 [[C]]
+;
+  %B = mul i8 %A, 8
+  %C = mul i8 %B, 8
+  ret i8 %C
 }
 
-define i32 @test7(i32 %i) {
-; CHECK-LABEL: @test7(
-        %tmp = mul i32 %i, -1           ; <i32> [#uses=1]
-        ret i32 %tmp
-; CHECK: sub i32 0, %i
+define i32 @neg(i32 %i) {
+; CHECK-LABEL: @neg(
+; CHECK-NEXT:    [[TMP:%.*]] = sub i32 0, [[I:%.*]]
+; CHECK-NEXT:    ret i32 [[TMP]]
+;
+  %tmp = mul i32 %i, -1
+  ret i32 %tmp
 }
 
-define i64 @test8(i64 %i) {
-; CHECK-LABEL: @test8(
-        %j = mul i64 %i, -1             ; <i64> [#uses=1]
-        ret i64 %j
-; CHECK: sub i64 0, %i
-}
-
-define i32 @test9(i32 %i) {
-; CHECK-LABEL: @test9(
-        %j = mul i32 %i, -1             ; <i32> [#uses=1]
-        ret i32 %j
-; CHECK: sub i32 0, %i
-}
+; Use the sign-bit as a mask:
+; (zext (A < 0)) * B --> (A >> 31) & B
 
 define i32 @test10(i32 %a, i32 %b) {
 ; CHECK-LABEL: @test10(
-        %c = icmp slt i32 %a, 0         ; <i1> [#uses=1]
-        %d = zext i1 %c to i32          ; <i32> [#uses=1]
-       ; e = b & (a >> 31)
-        %e = mul i32 %d, %b             ; <i32> [#uses=1]
-        ret i32 %e
-; CHECK: [[TEST10:%.*]] = ashr i32 %a, 31
-; CHECK-NEXT: %e = and i32 [[TEST10]], %b
-; CHECK-NEXT: ret i32 %e
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr i32 [[A:%.*]], 31
+; CHECK-NEXT:    [[E:%.*]] = and i32 [[TMP1]], [[B:%.*]]
+; CHECK-NEXT:    ret i32 [[E]]
+;
+  %c = icmp slt i32 %a, 0
+  %d = zext i1 %c to i32
+  %e = mul i32 %d, %b
+  ret i32 %e
 }
 
 define i32 @test11(i32 %a, i32 %b) {
 ; CHECK-LABEL: @test11(
-        %c = icmp sle i32 %a, -1                ; <i1> [#uses=1]
-        %d = zext i1 %c to i32          ; <i32> [#uses=1]
-        ; e = b & (a >> 31)
-        %e = mul i32 %d, %b             ; <i32> [#uses=1]
-        ret i32 %e
-; CHECK: [[TEST11:%.*]] = ashr i32 %a, 31
-; CHECK-NEXT: %e = and i32 [[TEST11]], %b
-; CHECK-NEXT: ret i32 %e
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr i32 [[A:%.*]], 31
+; CHECK-NEXT:    [[E:%.*]] = and i32 [[TMP1]], [[B:%.*]]
+; CHECK-NEXT:    ret i32 [[E]]
+;
+  %c = icmp sle i32 %a, -1
+  %d = zext i1 %c to i32
+  %e = mul i32 %d, %b
+  ret i32 %e
 }
 
+declare void @use32(i32)
+
 define i32 @test12(i32 %a, i32 %b) {
 ; CHECK-LABEL: @test12(
-        %c = icmp ugt i32 %a, 2147483647                ; <i1> [#uses=1]
-        %d = zext i1 %c to i32          ; <i32> [#uses=1]
-        %e = mul i32 %d, %b             ; <i32> [#uses=1]
-        ret i32 %e
-; CHECK: [[TEST12:%.*]] = ashr i32 %a, 31
-; CHECK-NEXT: %e = and i32 [[TEST12]], %b
-; CHECK-NEXT: ret i32 %e
-
-}
-
-; PR2642
-define internal void @test13(<4 x float>*) {
-; CHECK-LABEL: @test13(
-	load <4 x float>, <4 x float>* %0, align 1
-	fmul <4 x float> %2, < float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 >
-	store <4 x float> %3, <4 x float>* %0, align 1
-	ret void
-; CHECK-NEXT: ret void
-}
-
-define <16 x i8> @test14(<16 x i8> %a) {
-; CHECK-LABEL: @test14(
-        %b = mul <16 x i8> %a, zeroinitializer
-        ret <16 x i8> %b
-; CHECK-NEXT: ret <16 x i8> zeroinitializer
+; CHECK-NEXT:    [[A_LOBIT:%.*]] = lshr i32 [[A:%.*]], 31
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr i32 [[A]], 31
+; CHECK-NEXT:    [[E:%.*]] = and i32 [[TMP1]], [[B:%.*]]
+; CHECK-NEXT:    call void @use32(i32 [[A_LOBIT]])
+; CHECK-NEXT:    ret i32 [[E]]
+;
+  %c = icmp ugt i32 %a, 2147483647
+  %d = zext i1 %c to i32
+  %e = mul i32 %d, %b
+  call void @use32(i32 %d)
+  ret i32 %e
 }
 
 ; rdar://7293527
 define i32 @test15(i32 %A, i32 %B) {
 ; CHECK-LABEL: @test15(
-entry:
+; CHECK-NEXT:    [[M:%.*]] = shl i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i32 [[M]]
+;
   %shl = shl i32 1, %B
   %m = mul i32 %shl, %A
   ret i32 %m
-; CHECK: shl i32 %A, %B
+}
+
+; X * Y (when Y is a boolean) --> Y ? X : 0
+
+define i32 @mul_bool(i32 %x, i1 %y) {
+; CHECK-LABEL: @mul_bool(
+; CHECK-NEXT:    [[M:%.*]] = select i1 [[Y:%.*]], i32 [[X:%.*]], i32 0
+; CHECK-NEXT:    ret i32 [[M]]
+;
+  %z = zext i1 %y to i32
+  %m = mul i32 %x, %z
+  ret i32 %m
+}
+
+; Commute and test vector type.
+
+define <2 x i32> @mul_bool_vec(<2 x i32> %x, <2 x i1> %y) {
+; CHECK-LABEL: @mul_bool_vec(
+; CHECK-NEXT:    [[M:%.*]] = select <2 x i1> [[Y:%.*]], <2 x i32> [[X:%.*]], <2 x i32> zeroinitializer
+; CHECK-NEXT:    ret <2 x i32> [[M]]
+;
+  %z = zext <2 x i1> %y to <2 x i32>
+  %m = mul <2 x i32> %x, %z
+  ret <2 x i32> %m
+}
+
+define <2 x i32> @mul_bool_vec_commute(<2 x i32> %x, <2 x i1> %y) {
+; CHECK-LABEL: @mul_bool_vec_commute(
+; CHECK-NEXT:    [[M:%.*]] = select <2 x i1> [[Y:%.*]], <2 x i32> [[X:%.*]], <2 x i32> zeroinitializer
+; CHECK-NEXT:    ret <2 x i32> [[M]]
+;
+  %z = zext <2 x i1> %y to <2 x i32>
+  %m = mul <2 x i32> %z, %x
+  ret <2 x i32> %m
 }
 
-; X * Y (when Y is 0 or 1) --> x & (0-Y)
-define i32 @test16(i32 %b, i1 %c) {
-; CHECK-LABEL: @test16(
-        %d = zext i1 %c to i32          ; <i32> [#uses=1]
-        ; e = b & (a >> 31)
-        %e = mul i32 %d, %b             ; <i32> [#uses=1]
-        ret i32 %e
-; CHECK: [[TEST16:%.*]] = select i1 %c, i32 %b, i32 0
-; CHECK-NEXT: ret i32 [[TEST16]]
+; (A >>u 31) * B --> (A >>s 31) & B
+
+define i32 @signbit_mul(i32 %a, i32 %b) {
+; CHECK-LABEL: @signbit_mul(
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr i32 [[A:%.*]], 31
+; CHECK-NEXT:    [[E:%.*]] = and i32 [[TMP1]], [[B:%.*]]
+; CHECK-NEXT:    ret i32 [[E]]
+;
+  %d = lshr i32 %a, 31
+  %e = mul i32 %d, %b
+  ret i32 %e
 }
 
-; X * Y (when Y is 0 or 1) --> x & (0-Y)
-define i32 @test17(i32 %a, i32 %b) {
-; CHECK-LABEL: @test17(
-  %a.lobit = lshr i32 %a, 31
-  %e = mul i32 %a.lobit, %b
+define i32 @signbit_mul_commute_extra_use(i32 %a, i32 %b) {
+; CHECK-LABEL: @signbit_mul_commute_extra_use(
+; CHECK-NEXT:    [[D:%.*]] = lshr i32 [[A:%.*]], 31
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr i32 [[A]], 31
+; CHECK-NEXT:    [[E:%.*]] = and i32 [[TMP1]], [[B:%.*]]
+; CHECK-NEXT:    call void @use32(i32 [[D]])
+; CHECK-NEXT:    ret i32 [[E]]
+;
+  %d = lshr i32 %a, 31
+  %e = mul i32 %b, %d
+  call void @use32(i32 %d)
   ret i32 %e
-; CHECK: [[TEST17:%.*]] = ashr i32 %a, 31
-; CHECK-NEXT: %e = and i32 [[TEST17]], %b
-; CHECK-NEXT: ret i32 %e
+}
+
+; (A >>u 31)) * B --> (A >>s 31) & B
+
+define <2 x i32> @signbit_mul_vec(<2 x i32> %a, <2 x i32> %b) {
+; CHECK-LABEL: @signbit_mul_vec(
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr <2 x i32> [[A:%.*]], <i32 31, i32 31>
+; CHECK-NEXT:    [[E:%.*]] = and <2 x i32> [[TMP1]], [[B:%.*]]
+; CHECK-NEXT:    ret <2 x i32> [[E]]
+;
+  %d = lshr <2 x i32> %a, <i32 31, i32 31>
+  %e = mul <2 x i32> %d, %b
+  ret <2 x i32> %e
+}
+
+define <2 x i32> @signbit_mul_vec_commute(<2 x i32> %a, <2 x i32> %b) {
+; CHECK-LABEL: @signbit_mul_vec_commute(
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr <2 x i32> [[A:%.*]], <i32 31, i32 31>
+; CHECK-NEXT:    [[E:%.*]] = and <2 x i32> [[TMP1]], [[B:%.*]]
+; CHECK-NEXT:    ret <2 x i32> [[E]]
+;
+  %d = lshr <2 x i32> %a, <i32 31, i32 31>
+  %e = mul <2 x i32> %b, %d
+  ret <2 x i32> %e
 }
 
 define i32 @test18(i32 %A, i32 %B) {
 ; CHECK-LABEL: @test18(
+; CHECK-NEXT:    ret i32 0
+;
   %C = and i32 %A, 1
   %D = and i32 %B, 1
-
   %E = mul i32 %C, %D
   %F = and i32 %E, 16
   ret i32 %F
-; CHECK-NEXT: ret i32 0
 }
 
 declare {i32, i1} @llvm.smul.with.overflow.i32(i32, i32)
@@ -170,6 +194,9 @@
 
 define i32 @test19(i32 %A, i32 %B) {
 ; CHECK-LABEL: @test19(
+; CHECK-NEXT:    call void @use(i1 false)
+; CHECK-NEXT:    ret i32 0
+;
   %C = and i32 %A, 1
   %D = and i32 %B, 1
 
@@ -180,122 +207,204 @@
   call void @use(i1 %G)
   %H = and i32 %F, 16
   ret i32 %H
-; CHECK: ret i32 0
 }
 
 define <2 x i64> @test20(<2 x i64> %A) {
 ; CHECK-LABEL: @test20(
-        %B = add <2 x i64> %A, <i64 12, i64 14>
-        %C = mul <2 x i64> %B, <i64 3, i64 2>
-        ret <2 x i64> %C
-; CHECK: mul <2 x i64> %A, <i64 3, i64 2>
-; CHECK: add <2 x i64> %{{.}}, <i64 36, i64 28>
+; CHECK-NEXT:    [[TMP1:%.*]] = mul <2 x i64> [[A:%.*]], <i64 3, i64 2>
+; CHECK-NEXT:    [[C:%.*]] = add <2 x i64> [[TMP1]], <i64 36, i64 28>
+; CHECK-NEXT:    ret <2 x i64> [[C]]
+;
+  %B = add <2 x i64> %A, <i64 12, i64 14>
+  %C = mul <2 x i64> %B, <i64 3, i64 2>
+  ret <2 x i64> %C
 }
 
 define <2 x i1> @test21(<2 x i1> %A, <2 x i1> %B) {
 ; CHECK-LABEL: @test21(
-        %C = mul <2 x i1> %A, %B
-        ret <2 x i1> %C
-; CHECK: %C = and <2 x i1> %A, %B
+; CHECK-NEXT:    [[C:%.*]] = and <2 x i1> [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret <2 x i1> [[C]]
+;
+  %C = mul <2 x i1> %A, %B
+  ret <2 x i1> %C
 }
 
 define i32 @test22(i32 %A) {
 ; CHECK-LABEL: @test22(
-        %B = mul nsw i32 %A, -1
-        ret i32 %B
-; CHECK: sub nsw i32 0, %A
+; CHECK-NEXT:    [[B:%.*]] = sub nsw i32 0, [[A:%.*]]
+; CHECK-NEXT:    ret i32 [[B]]
+;
+  %B = mul nsw i32 %A, -1
+  ret i32 %B
 }
 
 define i32 @test23(i32 %A) {
 ; CHECK-LABEL: @test23(
-        %B = shl nuw i32 %A, 1
-        %C = mul nuw i32 %B, 3
-        ret i32 %C
-; CHECK: mul nuw i32 %A, 6
+; CHECK-NEXT:    [[C:%.*]] = mul nuw i32 [[A:%.*]], 6
+; CHECK-NEXT:    ret i32 [[C]]
+;
+  %B = shl nuw i32 %A, 1
+  %C = mul nuw i32 %B, 3
+  ret i32 %C
 }
 
 define i32 @test24(i32 %A) {
 ; CHECK-LABEL: @test24(
-        %B = shl nsw i32 %A, 1
-        %C = mul nsw i32 %B, 3
-        ret i32 %C
-; CHECK: mul nsw i32 %A, 6
+; CHECK-NEXT:    [[C:%.*]] = mul nsw i32 [[A:%.*]], 6
+; CHECK-NEXT:    ret i32 [[C]]
+;
+  %B = shl nsw i32 %A, 1
+  %C = mul nsw i32 %B, 3
+  ret i32 %C
+}
+
+define i32 @neg_neg_mul(i32 %A, i32 %B) {
+; CHECK-LABEL: @neg_neg_mul(
+; CHECK-NEXT:    [[E:%.*]] = mul i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i32 [[E]]
+;
+  %C = sub i32 0, %A
+  %D = sub i32 0, %B
+  %E = mul i32 %C, %D
+  ret i32 %E
+}
+
+define i32 @neg_neg_mul_nsw(i32 %A, i32 %B) {
+; CHECK-LABEL: @neg_neg_mul_nsw(
+; CHECK-NEXT:    [[E:%.*]] = mul nsw i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i32 [[E]]
+;
+  %C = sub nsw i32 0, %A
+  %D = sub nsw i32 0, %B
+  %E = mul nsw i32 %C, %D
+  ret i32 %E
 }
 
-define i32 @test25(i32 %A, i32 %B) {
-; CHECK-LABEL: @test25(
-        %C = sub nsw i32 0, %A
-        %D = sub nsw i32 0, %B
-        %E = mul nsw i32 %C, %D
-        ret i32 %E
-; CHECK: mul nsw i32 %A, %B
+define i124 @neg_neg_mul_apint(i124 %A, i124 %B) {
+; CHECK-LABEL: @neg_neg_mul_apint(
+; CHECK-NEXT:    [[E:%.*]] = mul i124 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i124 [[E]]
+;
+  %C = sub i124 0, %A
+  %D = sub i124 0, %B
+  %E = mul i124 %C, %D
+  ret i124 %E
+}
+
+define i32 @neg_mul_constant(i32 %A) {
+; CHECK-LABEL: @neg_mul_constant(
+; CHECK-NEXT:    [[E:%.*]] = mul i32 [[A:%.*]], -7
+; CHECK-NEXT:    ret i32 [[E]]
+;
+  %C = sub i32 0, %A
+  %E = mul i32 %C, 7
+  ret i32 %E
+}
+
+define i55 @neg_mul_constant_apint(i55 %A) {
+; CHECK-LABEL: @neg_mul_constant_apint(
+; CHECK-NEXT:    [[E:%.*]] = mul i55 [[A:%.*]], -7
+; CHECK-NEXT:    ret i55 [[E]]
+;
+  %C = sub i55 0, %A
+  %E = mul i55 %C, 7
+  ret i55 %E
+}
+
+define <3 x i8> @neg_mul_constant_vec(<3 x i8> %a) {
+; CHECK-LABEL: @neg_mul_constant_vec(
+; CHECK-NEXT:    [[B:%.*]] = mul <3 x i8> [[A:%.*]], <i8 -5, i8 -5, i8 -5>
+; CHECK-NEXT:    ret <3 x i8> [[B]]
+;
+  %A = sub <3 x i8> zeroinitializer, %a
+  %B = mul <3 x i8> %A, <i8 5, i8 5, i8 5>
+  ret <3 x i8> %B
+}
+
+define <3 x i4> @neg_mul_constant_vec_weird(<3 x i4> %a) {
+; CHECK-LABEL: @neg_mul_constant_vec_weird(
+; CHECK-NEXT:    [[B:%.*]] = mul <3 x i4> [[A:%.*]], <i4 -5, i4 -5, i4 -5>
+; CHECK-NEXT:    ret <3 x i4> [[B]]
+;
+  %A = sub <3 x i4> zeroinitializer, %a
+  %B = mul <3 x i4> %A, <i4 5, i4 5, i4 5>
+  ret <3 x i4> %B
 }
 
 define i32 @test26(i32 %A, i32 %B) {
 ; CHECK-LABEL: @test26(
-        %C = shl nsw i32 1, %B
-        %D = mul nsw i32 %A, %C
-        ret i32 %D
-; CHECK: shl nsw i32 %A, %B
+; CHECK-NEXT:    [[D:%.*]] = shl nsw i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i32 [[D]]
+;
+  %C = shl nsw i32 1, %B
+  %D = mul nsw i32 %A, %C
+  ret i32 %D
 }
 
 define i32 @test27(i32 %A, i32 %B) {
 ; CHECK-LABEL: @test27(
-        %C = shl i32 1, %B
-        %D = mul nuw i32 %A, %C
-        ret i32 %D
-; CHECK: shl nuw i32 %A, %B
+; CHECK-NEXT:    [[D:%.*]] = shl nuw i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i32 [[D]]
+;
+  %C = shl i32 1, %B
+  %D = mul nuw i32 %A, %C
+  ret i32 %D
 }
 
 define i32 @test28(i32 %A) {
 ; CHECK-LABEL: @test28(
-        %B = shl i32 1, %A
-        %C = mul nsw i32 %B, %B
-        ret i32 %C
-; CHECK:      %[[shl1:.*]] = shl i32 1, %A
-; CHECK-NEXT: %[[shl2:.*]] = shl i32 %[[shl1]], %A
-; CHECK-NEXT: ret i32 %[[shl2]]
+; CHECK-NEXT:    [[B:%.*]] = shl i32 1, [[A:%.*]]
+; CHECK-NEXT:    [[C:%.*]] = shl i32 [[B]], [[A]]
+; CHECK-NEXT:    ret i32 [[C]]
+;
+  %B = shl i32 1, %A
+  %C = mul nsw i32 %B, %B
+  ret i32 %C
 }
 
 define i64 @test29(i31 %A, i31 %B) {
 ; CHECK-LABEL: @test29(
-        %C = sext i31 %A to i64
-        %D = sext i31 %B to i64
-        %E = mul i64 %C, %D
-        ret i64 %E
-; CHECK:      %[[sext1:.*]] = sext i31 %A to i64
-; CHECK-NEXT: %[[sext2:.*]] = sext i31 %B to i64
-; CHECK-NEXT: %[[mul:.*]] = mul nsw i64 %[[sext1]], %[[sext2]]
-; CHECK-NEXT: ret i64 %[[mul]]
+; CHECK-NEXT:    [[C:%.*]] = sext i31 [[A:%.*]] to i64
+; CHECK-NEXT:    [[D:%.*]] = sext i31 [[B:%.*]] to i64
+; CHECK-NEXT:    [[E:%.*]] = mul nsw i64 [[C]], [[D]]
+; CHECK-NEXT:    ret i64 [[E]]
+;
+  %C = sext i31 %A to i64
+  %D = sext i31 %B to i64
+  %E = mul i64 %C, %D
+  ret i64 %E
 }
 
 define i64 @test30(i32 %A, i32 %B) {
 ; CHECK-LABEL: @test30(
-        %C = zext i32 %A to i64
-        %D = zext i32 %B to i64
-        %E = mul i64 %C, %D
-        ret i64 %E
-; CHECK:      %[[zext1:.*]] = zext i32 %A to i64
-; CHECK-NEXT: %[[zext2:.*]] = zext i32 %B to i64
-; CHECK-NEXT: %[[mul:.*]] = mul nuw i64 %[[zext1]], %[[zext2]]
-; CHECK-NEXT: ret i64 %[[mul]]
+; CHECK-NEXT:    [[C:%.*]] = zext i32 [[A:%.*]] to i64
+; CHECK-NEXT:    [[D:%.*]] = zext i32 [[B:%.*]] to i64
+; CHECK-NEXT:    [[E:%.*]] = mul nuw i64 [[C]], [[D]]
+; CHECK-NEXT:    ret i64 [[E]]
+;
+  %C = zext i32 %A to i64
+  %D = zext i32 %B to i64
+  %E = mul i64 %C, %D
+  ret i64 %E
 }
 
 @PR22087 = external global i32
 define i32 @test31(i32 %V) {
-; CHECK-LABEL: @test31
+; CHECK-LABEL: @test31(
+; CHECK-NEXT:    [[MUL:%.*]] = shl i32 [[V:%.*]], zext (i1 icmp ne (i32* inttoptr (i64 1 to i32*), i32* @PR22087) to i32)
+; CHECK-NEXT:    ret i32 [[MUL]]
+;
   %mul = mul i32 %V, shl (i32 1, i32 zext (i1 icmp ne (i32* inttoptr (i64 1 to i32*), i32* @PR22087) to i32))
   ret i32 %mul
-; CHECK:      %[[mul:.*]] = shl i32 %V, zext (i1 icmp ne (i32* inttoptr (i64 1 to i32*), i32* @PR22087) to i32)
-; CHECK-NEXT: ret i32 %[[mul]]
 }
 
 define i32 @test32(i32 %X) {
-; CHECK-LABEL: @test32
+; CHECK-LABEL: @test32(
+; CHECK-NEXT:    [[MUL:%.*]] = shl i32 [[X:%.*]], 31
+; CHECK-NEXT:    ret i32 [[MUL]]
+;
   %mul = mul nsw i32 %X, -2147483648
   ret i32 %mul
-; CHECK:      %[[shl:.*]] = shl i32 %X, 31
-; CHECK-NEXT: ret i32 %[[shl]]
 }
 
 define <2 x i32> @test32vec(<2 x i32> %X) {
@@ -308,10 +417,11 @@
 }
 
 define i32 @test33(i32 %X) {
-; CHECK-LABEL: @test33
+; CHECK-LABEL: @test33(
+; CHECK-NEXT:    [[MUL:%.*]] = shl nsw i32 [[X:%.*]], 30
+; CHECK-NEXT:    ret i32 [[MUL]]
+;
   %mul = mul nsw i32 %X, 1073741824
-; CHECK:      %[[shl:.*]] = shl nsw i32 %X, 30
-; CHECK-NEXT: ret i32 %[[shl]]
   ret i32 %mul
 }