Mercurial > hg > CbC > CbC_llvm
diff lib/Target/Mips/MipsFrameLowering.cpp @ 77:54457678186b LLVM3.6
LLVM 3.6
author | Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> |
---|---|
date | Mon, 08 Sep 2014 22:06:00 +0900 |
parents | 95c75e76d11b |
children | 60c9769439b8 |
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--- a/lib/Target/Mips/MipsFrameLowering.cpp Thu Dec 12 15:22:36 2013 +0900 +++ b/lib/Target/Mips/MipsFrameLowering.cpp Mon Sep 08 22:06:00 2014 +0900 @@ -82,9 +82,8 @@ // //===----------------------------------------------------------------------===// -const MipsFrameLowering *MipsFrameLowering::create(MipsTargetMachine &TM, - const MipsSubtarget &ST) { - if (TM.getSubtargetImpl()->inMips16Mode()) +const MipsFrameLowering *MipsFrameLowering::create(const MipsSubtarget &ST) { + if (ST.inMips16Mode()) return llvm::createMips16FrameLowering(ST); return llvm::createMipsSEFrameLowering(ST); @@ -101,7 +100,7 @@ uint64_t MipsFrameLowering::estimateStackSize(const MachineFunction &MF) const { const MachineFrameInfo *MFI = MF.getFrameInfo(); - const TargetRegisterInfo &TRI = *MF.getTarget().getRegisterInfo(); + const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); int64_t Offset = 0; @@ -110,7 +109,7 @@ Offset = std::max(Offset, -MFI->getObjectOffset(I)); // Conservatively assume all callee-saved registers will be saved. - for (const uint16_t *R = TRI.getCalleeSavedRegs(&MF); *R; ++R) { + for (const MCPhysReg *R = TRI.getCalleeSavedRegs(&MF); *R; ++R) { unsigned Size = TRI.getMinimalPhysRegClass(*R)->getSize(); Offset = RoundUpToAlignment(Offset + Size, Size); }