diff test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll @ 77:54457678186b LLVM3.6

LLVM 3.6
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Mon, 08 Sep 2014 22:06:00 +0900
parents e4204d083e25
children afa8332a0e37
line wrap: on
line diff
--- a/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll	Thu Dec 12 15:22:36 2013 +0900
+++ b/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll	Mon Sep 08 22:06:00 2014 +0900
@@ -3,7 +3,7 @@
 ; clang -Oz -c test1.cpp -emit-llvm -S -o
 ; Verify that we generate shld insruction when we are optimizing for size,
 ; even for X86_64 processors that are known to have poor latency double 
-; precision shift instuctions.
+; precision shift instructions.
 ; uint64_t lshift10(uint64_t a, uint64_t b)
 ; {
 ;     return (a << 10) | (b >> 54);
@@ -25,7 +25,7 @@
 ; clang -Os -c test2.cpp -emit-llvm -S
 ; Verify that we generate shld insruction when we are optimizing for size,
 ; even for X86_64 processors that are known to have poor latency double
-; precision shift instuctions.
+; precision shift instructions.
 ; uint64_t lshift11(uint64_t a, uint64_t b)
 ; {
 ;     return (a << 11) | (b >> 53);
@@ -46,7 +46,7 @@
 ; clang -O2 -c test2.cpp -emit-llvm -S
 ; Verify that we do not generate shld insruction when we are not optimizing
 ; for size for X86_64 processors that are known to have poor latency double
-; precision shift instuctions.
+; precision shift instructions.
 ; uint64_t lshift12(uint64_t a, uint64_t b)
 ; {
 ;     return (a << 12) | (b >> 52);