Mercurial > hg > CbC > CbC_llvm
diff test/MC/Mips/mips5/invalid-mips32r2.s @ 85:5e5d649e25d2
Update LLVM 3.7
| author | Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp> |
|---|---|
| date | Thu, 19 Feb 2015 15:19:25 +0900 |
| parents | 60c9769439b8 |
| children | c2174574ed3a |
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--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/test/MC/Mips/mips5/invalid-mips32r2.s Thu Feb 19 15:19:25 2015 +0900 @@ -0,0 +1,11 @@ +# Instructions that are invalid +# +# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips5 \ +# RUN: 2>%t1 +# RUN: FileCheck %s < %t1 + + .set noat + di $s8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + di # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + ei $t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + ei # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled