Mercurial > hg > CbC > CbC_llvm
diff test/CodeGen/X86/extractelement-legalization-store-ordering.ll @ 121:803732b1fca8
LLVM 5.0
author | kono |
---|---|
date | Fri, 27 Oct 2017 17:07:41 +0900 |
parents | afa8332a0e37 |
children | 3a76565eade5 |
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--- a/test/CodeGen/X86/extractelement-legalization-store-ordering.ll Fri Nov 25 19:14:25 2016 +0900 +++ b/test/CodeGen/X86/extractelement-legalization-store-ordering.ll Fri Oct 27 17:07:41 2017 +0900 @@ -1,4 +1,5 @@ -; RUN: llc < %s -mtriple i386-apple-darwin -mcpu=yonah | FileCheck %s +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah | FileCheck %s target datalayout = "e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128" @@ -6,30 +7,31 @@ ; into loads, off the stack or a previous store. ; Be very explicit about the ordering/stack offsets. +define void @test_extractelement_legalization_storereuse(<4 x i32> %a, i32* nocapture %x, i32* nocapture readonly %y, i32 %i) #0 { ; CHECK-LABEL: test_extractelement_legalization_storereuse: -; CHECK: # BB#0 -; CHECK-NEXT: pushl %ebx -; CHECK-NEXT: pushl %edi -; CHECK-NEXT: pushl %esi -; CHECK-NEXT: movl 16(%esp), %eax -; CHECK-NEXT: movl 24(%esp), %ecx -; CHECK-NEXT: movl 20(%esp), %edx -; CHECK-NEXT: paddd (%edx), %xmm0 -; CHECK-NEXT: movdqa %xmm0, (%edx) -; CHECK-NEXT: shll $4, %ecx -; CHECK-NEXT: movl (%ecx,%edx), %esi -; CHECK-NEXT: movl 12(%ecx,%edx), %edi -; CHECK-NEXT: movl 8(%ecx,%edx), %ebx -; CHECK-NEXT: movl 4(%ecx,%edx), %edx -; CHECK-NEXT: movl %esi, 12(%eax,%ecx) -; CHECK-NEXT: movl %edx, (%eax,%ecx) -; CHECK-NEXT: movl %ebx, 8(%eax,%ecx) -; CHECK-NEXT: movl %edi, 4(%eax,%ecx) -; CHECK-NEXT: popl %esi -; CHECK-NEXT: popl %edi -; CHECK-NEXT: popl %ebx -; CHECK-NEXT: retl -define void @test_extractelement_legalization_storereuse(<4 x i32> %a, i32* nocapture %x, i32* nocapture readonly %y, i32 %i) #0 { +; CHECK: ## BB#0: ## %entry +; CHECK-NEXT: pushl %ebx +; CHECK-NEXT: pushl %edi +; CHECK-NEXT: pushl %esi +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx +; CHECK-NEXT: paddd (%ecx), %xmm0 +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx +; CHECK-NEXT: movdqa %xmm0, (%ecx) +; CHECK-NEXT: movl (%ecx), %esi +; CHECK-NEXT: movl 4(%ecx), %edi +; CHECK-NEXT: shll $4, %edx +; CHECK-NEXT: movl 8(%ecx), %ebx +; CHECK-NEXT: movl 12(%ecx), %ecx +; CHECK-NEXT: movl %esi, 12(%eax,%edx) +; CHECK-NEXT: movl %edi, (%eax,%edx) +; CHECK-NEXT: movl %ebx, 8(%eax,%edx) +; CHECK-NEXT: movl %ecx, 4(%eax,%edx) +; CHECK-NEXT: popl %esi +; CHECK-NEXT: popl %edi +; CHECK-NEXT: popl %ebx +; CHECK-NEXT: retl +; CHECK-NEXT: ## -- End function entry: %0 = bitcast i32* %y to <4 x i32>* %1 = load <4 x i32>, <4 x i32>* %0, align 16