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diff test/CodeGen/Mips/mips64fpldst.ll @ 95:afa8332a0e37 LLVM3.8

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LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents 60c9769439b8
children 1172e4bd9c6f
line wrap: on
line diff
--- a/test/CodeGen/Mips/mips64fpldst.ll	Wed Feb 18 14:56:07 2015 +0900
+++ b/test/CodeGen/Mips/mips64fpldst.ll	Tue Oct 13 17:48:58 2015 +0900
@@ -16,7 +16,7 @@
 ; CHECK-N32: funcfl1
 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(f0)
 ; CHECK-N32: lwc1 $f{{[0-9]+}}, 0($[[R0]]) 
-  %0 = load float* @f0, align 4
+  %0 = load float, float* @f0, align 4
   ret float %0
 }
 
@@ -28,7 +28,7 @@
 ; CHECK-N32: funcfl2
 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(d0)
 ; CHECK-N32: ldc1 $f{{[0-9]+}}, 0($[[R0]]) 
-  %0 = load double* @d0, align 8 
+  %0 = load double, double* @d0, align 8 
   ret double %0
 }
 
@@ -40,7 +40,7 @@
 ; CHECK-N32: funcfs1
 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(f0)
 ; CHECK-N32: swc1 $f{{[0-9]+}}, 0($[[R0]]) 
-  %0 = load float* @f1, align 4 
+  %0 = load float, float* @f1, align 4 
   store float %0, float* @f0, align 4 
   ret void
 }
@@ -53,7 +53,7 @@
 ; CHECK-N32: funcfs2
 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(d0)
 ; CHECK-N32: sdc1 $f{{[0-9]+}}, 0($[[R0]]) 
-  %0 = load double* @d1, align 8 
+  %0 = load double, double* @d1, align 8 
   store double %0, double* @d0, align 8 
   ret void
 }