diff test/CodeGen/X86/2011-12-15-vec_shift.ll @ 95:afa8332a0e37 LLVM3.8

LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents 95c75e76d11b
children 803732b1fca8
line wrap: on
line diff
--- a/test/CodeGen/X86/2011-12-15-vec_shift.ll	Wed Feb 18 14:56:07 2015 +0900
+++ b/test/CodeGen/X86/2011-12-15-vec_shift.ll	Tue Oct 13 17:48:58 2015 +0900
@@ -12,8 +12,8 @@
 
   ; Make sure we're masking and pcmp'ing the VSELECT conditon vector.
   ; CHECK-WO-SSE4: psllw $5, [[REG1:%xmm.]]
-  ; CHECK-WO-SSE4: pand [[REG1]], [[REG2:%xmm.]]
-  ; CHECK-WO-SSE4: pcmpeqb {{%xmm., }}[[REG2]]
+  ; CHECK-WO-SSE4: pxor [[REG2:%xmm.]], [[REG2:%xmm.]]
+  ; CHECK-WO-SSE4: pcmpgtb {{%xmm., }}[[REG2]]
   %1 = shl <16 x i8> %a, %b
   ret <16 x i8> %1
 }