Mercurial > hg > CbC > CbC_llvm

diff test/CodeGen/SystemZ/asm-18.ll @ 147:c2174574ed3a

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LLVM 10
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Wed, 14 Aug 2019 16:55:33 +0900
parents afa8332a0e37
children
line wrap: on
line diff
--- a/test/CodeGen/SystemZ/asm-18.ll	Sat Feb 17 09:57:20 2018 +0900
+++ b/test/CodeGen/SystemZ/asm-18.ll	Wed Aug 14 16:55:33 2019 +0900
@@ -19,10 +19,10 @@
 ; CHECK: br %r14
   %ptr3 = getelementptr i32, i32 *%ptr1, i64 1024
   %ptr4 = getelementptr i32, i32 *%ptr2, i64 131071
-  %old1 = load i32 , i32 *%ptr1
-  %old2 = load i32 , i32 *%ptr2
-  %old3 = load i32 , i32 *%ptr3
-  %old4 = load i32 , i32 *%ptr4
+  %old1 = load i32, i32 *%ptr1
+  %old2 = load i32, i32 *%ptr2
+  %old3 = load i32, i32 *%ptr3
+  %old4 = load i32, i32 *%ptr4
   %res = call { i32, i32, i32, i32 } asm "blah $0, $1, $2, $3",
               "=h,=r,=h,=r,0,1,2,3"(i32 %old1, i32 %old2, i32 %old3, i32 %old4)
   %new1 = extractvalue { i32, i32, i32, i32 } %res, 0
@@ -63,10 +63,10 @@
 ; CHECK: br %r14
   %ptr3 = getelementptr i8, i8 *%ptr1, i64 4096
   %ptr4 = getelementptr i8, i8 *%ptr2, i64 524287
-  %val1 = load i8 , i8 *%ptr1
-  %val2 = load i8 , i8 *%ptr2
-  %val3 = load i8 , i8 *%ptr3
-  %val4 = load i8 , i8 *%ptr4
+  %val1 = load i8, i8 *%ptr1
+  %val2 = load i8, i8 *%ptr2
+  %val3 = load i8, i8 *%ptr3
+  %val4 = load i8, i8 *%ptr4
   %ext1 = sext i8 %val1 to i32
   %ext2 = sext i8 %val2 to i32
   %ext3 = sext i8 %val3 to i32
@@ -87,10 +87,10 @@
 ; CHECK: br %r14
   %ptr3 = getelementptr i16, i16 *%ptr1, i64 2048
   %ptr4 = getelementptr i16, i16 *%ptr2, i64 262143
-  %val1 = load i16 , i16 *%ptr1
-  %val2 = load i16 , i16 *%ptr2
-  %val3 = load i16 , i16 *%ptr3
-  %val4 = load i16 , i16 *%ptr4
+  %val1 = load i16, i16 *%ptr1
+  %val2 = load i16, i16 *%ptr2
+  %val3 = load i16, i16 *%ptr3
+  %val4 = load i16, i16 *%ptr4
   %ext1 = sext i16 %val1 to i32
   %ext2 = sext i16 %val2 to i32
   %ext3 = sext i16 %val3 to i32
@@ -111,10 +111,10 @@
 ; CHECK: br %r14
   %ptr3 = getelementptr i8, i8 *%ptr1, i64 4096
   %ptr4 = getelementptr i8, i8 *%ptr2, i64 524287
-  %val1 = load i8 , i8 *%ptr1
-  %val2 = load i8 , i8 *%ptr2
-  %val3 = load i8 , i8 *%ptr3
-  %val4 = load i8 , i8 *%ptr4
+  %val1 = load i8, i8 *%ptr1
+  %val2 = load i8, i8 *%ptr2
+  %val3 = load i8, i8 *%ptr3
+  %val4 = load i8, i8 *%ptr4
   %ext1 = zext i8 %val1 to i32
   %ext2 = zext i8 %val2 to i32
   %ext3 = zext i8 %val3 to i32
@@ -135,10 +135,10 @@
 ; CHECK: br %r14
   %ptr3 = getelementptr i16, i16 *%ptr1, i64 2048
   %ptr4 = getelementptr i16, i16 *%ptr2, i64 262143
-  %val1 = load i16 , i16 *%ptr1
-  %val2 = load i16 , i16 *%ptr2
-  %val3 = load i16 , i16 *%ptr3
-  %val4 = load i16 , i16 *%ptr4
+  %val1 = load i16, i16 *%ptr1
+  %val2 = load i16, i16 *%ptr2
+  %val3 = load i16, i16 *%ptr3
+  %val4 = load i16, i16 *%ptr4
   %ext1 = zext i16 %val1 to i32
   %ext2 = zext i16 %val2 to i32
   %ext3 = zext i16 %val3 to i32
@@ -290,11 +290,14 @@
 }
 
 ; Test selects involving high registers.
+; Note that we prefer to use a LOCR and move the result to a high register.
 define void @f13(i32 %x, i32 %y) {
 ; CHECK-LABEL: f13:
-; CHECK: llihl [[REG:%r[0-5]]], 0
-; CHECK: cije %r2, 0
-; CHECK: iihf [[REG]], 2102030405
+; CHECK-DAG: chi %r2, 0
+; CHECK-DAG: iilf [[REG1:%r[0-5]]], 2102030405
+; CHECK-DAG: lhi [[REG2:%r[0-5]]], 0
+; CHECK: locre [[REG1]], [[REG2]]
+; CHECK: risbhg [[REG:%r[0-5]]], [[REG1]], 0, 159, 32
 ; CHECK: blah [[REG]]
 ; CHECK: br %r14
   %cmp = icmp eq i32 %x, 0
@@ -306,9 +309,10 @@
 ; Test selects involving low registers.
 define void @f14(i32 %x, i32 %y) {
 ; CHECK-LABEL: f14:
-; CHECK: lhi [[REG:%r[0-5]]], 0
-; CHECK: cije %r2, 0
-; CHECK: iilf [[REG]], 2102030405
+; CHECK-DAG: chi %r2, 0
+; CHECK-DAG: iilf [[REG:%r[0-5]]], 2102030405
+; CHECK-DAG: lhi [[REG1:%r[0-5]]], 0
+; CHECK: locre [[REG]], [[REG1]]
 ; CHECK: blah [[REG]]
 ; CHECK: br %r14
   %cmp = icmp eq i32 %x, 0
@@ -599,13 +603,13 @@
 }
 
 ; Test three-operand halfword immediate addition involving mixtures of low
-; and high registers.  RISBHG/AIH would be OK too, instead of AHIK/RISBHG.
+; and high registers.  AHIK/RISBHG would be OK too, instead of RISBHG/AIH.
 define i32 @f28(i32 %old) {
 ; CHECK-LABEL: f28:
 ; CHECK: ahik [[REG1:%r[0-5]]], %r2, 14
 ; CHECK: stepa %r2, [[REG1]]
-; CHECK: ahik [[TMP:%r[0-5]]], [[REG1]], 254
-; CHECK: risbhg [[REG2:%r[0-5]]], [[TMP]], 0, 159, 32
+; CHECK: risbhg  [[REG1]], [[REG1]], 0, 159, 32
+; CHECK: aih     [[REG1]], 254
 ; CHECK: stepb [[REG1]], [[REG2]]
 ; CHECK: risbhg [[REG3:%r[0-5]]], [[REG2]], 0, 159, 0
 ; CHECK: aih [[REG3]], 127
@@ -714,11 +718,11 @@
 ; CHECK: clhf [[REG2]], 0(%r3)
 ; CHECK: br %r14
   %res1 = call i32 asm "stepa $0", "=h"()
-  %load1 = load i32 , i32 *%ptr1
+  %load1 = load i32, i32 *%ptr1
   %cmp1 = icmp sle i32 %res1, %load1
   %sel1 = select i1 %cmp1, i32 0, i32 1
   %res2 = call i32 asm "stepb $0, $1", "=h,r"(i32 %sel1)
-  %load2 = load i32 , i32 *%ptr2
+  %load2 = load i32, i32 *%ptr2
   %cmp2 = icmp ule i32 %res2, %load2
   %sel2 = select i1 %cmp2, i32 0, i32 1
   store i32 %sel2, i32 *%ptr1
@@ -734,13 +738,88 @@
 ; CHECK: cl [[REG2]], 0(%r3)
 ; CHECK: br %r14
   %res1 = call i32 asm "stepa $0", "=r"()
-  %load1 = load i32 , i32 *%ptr1
+  %load1 = load i32, i32 *%ptr1
   %cmp1 = icmp sle i32 %res1, %load1
   %sel1 = select i1 %cmp1, i32 0, i32 1
   %res2 = call i32 asm "stepb $0, $1", "=r,r"(i32 %sel1)
-  %load2 = load i32 , i32 *%ptr2
+  %load2 = load i32, i32 *%ptr2
   %cmp2 = icmp ule i32 %res2, %load2
   %sel2 = select i1 %cmp2, i32 0, i32 1
   store i32 %sel2, i32 *%ptr1
   ret void
 }
+
+; Test immediate addition with overflow involving high registers.
+define void @f35() {
+; CHECK-LABEL: f35:
+; CHECK: stepa [[REG:%r[0-5]]]
+; CHECK: aih [[REG]], -32768
+; CHECK: ipm [[REGCC:%r[0-5]]]
+; CHECK: afi [[REGCC]], 1342177280
+; CHECK: srl [[REGCC]], 31
+; CHECK: stepb [[REG]], [[REGCC]]
+; CHECK: aih [[REG]], 1
+; CHECK: ipm [[REGCC:%r[0-5]]]
+; CHECK: afi [[REGCC]], 1342177280
+; CHECK: srl [[REGCC]], 31
+; CHECK: stepc [[REG]], [[REGCC]]
+; CHECK: aih [[REG]], 32767
+; CHECK: ipm [[REGCC:%r[0-5]]]
+; CHECK: afi [[REGCC]], 1342177280
+; CHECK: srl [[REGCC]], 31
+; CHECK: stepd [[REG]], [[REGCC]]
+; CHECK: br %r14
+  %res1 = call i32 asm "stepa $0", "=h"()
+  %t1 = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %res1, i32 -32768)
+  %val1 = extractvalue {i32, i1} %t1, 0
+  %obit1 = extractvalue {i32, i1} %t1, 1
+  %res2 = call i32 asm "stepb $0, $2", "=h,h,d"(i32 %val1, i1 %obit1)
+  %t2 = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %res2, i32 1)
+  %val2 = extractvalue {i32, i1} %t2, 0
+  %obit2 = extractvalue {i32, i1} %t2, 1
+  %res3 = call i32 asm "stepc $0, $2", "=h,h,d"(i32 %val2, i1 %obit2)
+  %t3 = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %res3, i32 32767)
+  %val3 = extractvalue {i32, i1} %t3, 0
+  %obit3 = extractvalue {i32, i1} %t3, 1
+  call void asm sideeffect "stepd $0, $1", "h,d"(i32 %val3, i1 %obit3)
+  ret void
+}
+
+; Test large immediate addition with overflow involving high registers.
+define void @f36() {
+; CHECK-LABEL: f36:
+; CHECK: stepa [[REG:%r[0-5]]]
+; CHECK: aih [[REG]], -2147483648
+; CHECK: ipm [[REGCC:%r[0-5]]]
+; CHECK: afi [[REGCC]], 1342177280
+; CHECK: srl [[REGCC]], 31
+; CHECK: stepb [[REG]], [[REGCC]]
+; CHECK: aih [[REG]], 1
+; CHECK: ipm [[REGCC:%r[0-5]]]
+; CHECK: afi [[REGCC]], 1342177280
+; CHECK: srl [[REGCC]], 31
+; CHECK: stepc [[REG]], [[REGCC]]
+; CHECK: aih [[REG]], 2147483647
+; CHECK: ipm [[REGCC:%r[0-5]]]
+; CHECK: afi [[REGCC]], 1342177280
+; CHECK: srl [[REGCC]], 31
+; CHECK: stepd [[REG]], [[REGCC]]
+; CHECK: br %r14
+  %res1 = call i32 asm "stepa $0", "=h"()
+  %t1 = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %res1, i32 -2147483648)
+  %val1 = extractvalue {i32, i1} %t1, 0
+  %obit1 = extractvalue {i32, i1} %t1, 1
+  %res2 = call i32 asm "stepb $0, $2", "=h,h,d"(i32 %val1, i1 %obit1)
+  %t2 = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %res2, i32 1)
+  %val2 = extractvalue {i32, i1} %t2, 0
+  %obit2 = extractvalue {i32, i1} %t2, 1
+  %res3 = call i32 asm "stepc $0, $2", "=h,h,d"(i32 %val2, i1 %obit2)
+  %t3 = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %res3, i32 2147483647)
+  %val3 = extractvalue {i32, i1} %t3, 0
+  %obit3 = extractvalue {i32, i1} %t3, 1
+  call void asm sideeffect "stepd $0, $1", "h,d"(i32 %val3, i1 %obit3)
+  ret void
+}
+
+declare {i32, i1} @llvm.sadd.with.overflow.i32(i32, i32) nounwind readnone
+