diff test/MC/Mips/mips-fpu-instructions.s @ 147:c2174574ed3a

LLVM 10
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Wed, 14 Aug 2019 16:55:33 +0900
parents afa8332a0e37
children
line wrap: on
line diff
--- a/test/MC/Mips/mips-fpu-instructions.s	Sat Feb 17 09:57:20 2018 +0900
+++ b/test/MC/Mips/mips-fpu-instructions.s	Wed Aug 14 16:55:33 2019 +0900
@@ -1,5 +1,5 @@
-# RUN: llvm-mc  %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
-# RUN: llvm-mc  %s -triple=mips64el-unknown-linux -show-encoding -mcpu=mips64r2 | FileCheck %s
+# RUN: llvm-mc  %s -triple=mipsel-unknown-linux -show-encoding -show-inst -mcpu=mips32r2 | FileCheck %s --check-prefixes=CHECK,CHECK-32
+# RUN: llvm-mc  %s -triple=mips64el-unknown-linux -show-encoding -show-inst -mcpu=mips64r2 | FileCheck %s --check-prefixes=CHECK,CHECK-64
 # Check that the assembler can handle the documented syntax
 # for FPU instructions.
 #------------------------------------------------------------------------------
@@ -123,6 +123,8 @@
 #------------------------------------------------------------------------------
 # CHECK:  cvt.d.s   $f6, $f7          # encoding: [0xa1,0x39,0x00,0x46]
 # CHECK:  cvt.d.w   $f12, $f14        # encoding: [0x21,0x73,0x80,0x46]
+# CHECK-32:                           # <MCInst #{{.*}} CVT_D32_W
+# CHECK-64:                           # <MCInst #{{.*}} CVT_D64_W
 # CHECK:  cvt.s.d   $f12, $f14        # encoding: [0x20,0x73,0x20,0x46]
 # CHECK:  cvt.s.w   $f6, $f7          # encoding: [0xa0,0x39,0x80,0x46]
 # CHECK:  cvt.w.d   $f12, $f14        # encoding: [0x24,0x73,0x20,0x46]