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view test/CodeGen/Mips/mips64sinttofpsf.ll @ 120:1172e4bd9c6f

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update 4.0.0
author mir3636
date Fri, 25 Nov 2016 19:14:25 +0900
parents afa8332a0e37
children
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; RUN: llc -march=mips64 -mcpu=mips64r2 -mattr=+soft-float -O0 < %s | FileCheck %s


define double @foo() #0 {
entry:
  %x = alloca i32, align 4
  store volatile i32 -32, i32* %x, align 4
  %0 = load volatile i32, i32* %x, align 4
  %conv = sitofp i32 %0 to double
  ret double %conv

; CHECK-NOT:        dsll
; CHECK-NOT:        dsrl

}