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view llvm/test/CodeGen/AMDGPU/waitcnt-no-redundant.mir @ 252:1f2b6ac9f198 llvm-original
LLVM16-1
author | Shinji KONO <kono@ie.u-ryukyu.ac.jp> |
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date | Fri, 18 Aug 2023 09:04:13 +0900 |
parents | 5f17cb93ff66 |
children |
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# RUN: llc -mtriple=amdgcn -verify-machineinstrs -run-pass si-insert-waitcnts -o - %s | FileCheck %s # Check that the waitcnt pass does *not* insert a redundant waitcnt instr. # In this testcase, ensure that pass does not insert redundant S_WAITCNT 3952 ... # CHECK-LABEL: name: waitcnt-no-redundant # CHECK: S_WAITCNT 3952 # CHECK-NEXT: FLAT_ATOMIC_CMPSWAP # CHECK-NEXT: S_WAITCNT 3952 # CHECK-NEXT: BUFFER_WBINVL1 name: waitcnt-no-redundant body: | bb.0: renamable $vgpr0 = V_MOV_B32_e32 0, implicit $exec bb.1: S_WAITCNT 3952 FLAT_ATOMIC_CMPSWAP undef renamable $vgpr0_vgpr1, renamable $vgpr0_vgpr1, 0, 0, implicit $exec, implicit $flat_scr S_WAITCNT 3952 BUFFER_WBINVL1 implicit $exec S_BRANCH %bb.1 ... # Check that the waitcnt pass does *not* insert a waitcnt inst after S_BUFFER_LOAD. # WAR hazard does not apply here, because S_BUFFER_LOAD accesses invariant memory. ... # CHECK-LABEL: name: waitcnt-no-war-wait # CHECK: S_WAITCNT 0 # CHECK-NEXT: S_BUFFER_LOAD_DWORD_IMM # CHECK-NEXT: TBUFFER_STORE_FORMAT_X_OFFEN_exact name: waitcnt-no-war-wait body: | bb.0: renamable $sgpr8 = S_BUFFER_LOAD_DWORD_IMM renamable $sgpr0_sgpr1_sgpr2_sgpr3, 276, 0 :: (dereferenceable invariant load (s32)) TBUFFER_STORE_FORMAT_X_OFFEN_exact killed renamable $vgpr0, renamable $vgpr15, renamable $sgpr4_sgpr5_sgpr6_sgpr7, renamable $sgpr9, 0, 116, 1, 0, implicit $exec :: (dereferenceable store (s32), align 1, addrspace 7) ...