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view test/CodeGen/Mips/llvm-ir/atomicrmx.ll @ 134:3a76565eade5 LLVM5.0.1

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update 5.0.1
author mir3636
date Sat, 17 Feb 2018 09:57:20 +0900
parents 7d135dc70f03
children
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line source

; RUN: llc -asm-show-inst  -march=mipsel -mcpu=mips32r6 < %s | \
; RUN:    FileCheck %s -check-prefix=CHK32
; RUN: llc -asm-show-inst  -march=mips64el -mcpu=mips64r6 < %s | \
; RUN:    FileCheck %s -check-prefix=CHK64

@a = common global i32 0, align 4
@b = common global i64 0, align 8


define i32 @ll_sc(i32 signext %x) {
; CHK32-LABEL: ll_sc

;CHK32:  LL_R6
;CHK32:  SC_R6
  %1 = atomicrmw add i32* @a, i32 %x monotonic
  ret i32 %1
}

define i64 @lld_scd(i64 signext %x) {
; CHK64-LABEL: lld_scd

;CHK64:  LLD_R6
;CHK64:  SCD_R6
  %1 = atomicrmw add i64* @b, i64 %x monotonic
  ret i64 %1
}