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view test/CodeGen/AArch64/arm64-sqshl-uqshl-i64Contant.ll @ 77:54457678186b LLVM3.6

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LLVM 3.6
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Mon, 08 Sep 2014 22:06:00 +0900
parents
children 1172e4bd9c6f
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; RUN: llc < %s -verify-machineinstrs -march=arm64 | FileCheck %s

; Check if sqshl/uqshl with constant shift amout can be selected. 
define i64 @test_vqshld_s64_i(i64 %a) {
; CHECK-LABEL: test_vqshld_s64_i:
; CHECK: sqshl {{d[0-9]+}}, {{d[0-9]+}}, #36
  %1 = tail call i64 @llvm.aarch64.neon.sqshl.i64(i64 %a, i64 36)
  ret i64 %1
}

define i64 @test_vqshld_u64_i(i64 %a) {
; CHECK-LABEL: test_vqshld_u64_i:
; CHECK: uqshl {{d[0-9]+}}, {{d[0-9]+}}, #36
  %1 = tail call i64 @llvm.aarch64.neon.uqshl.i64(i64 %a, i64 36)
  ret i64 %1
}

declare i64 @llvm.aarch64.neon.uqshl.i64(i64, i64)
declare i64 @llvm.aarch64.neon.sqshl.i64(i64, i64)