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view test/MC/Disassembler/AArch64/ldp-preind.predictable.txt @ 17:5e1f5bc27634

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remove codeFlag for llvm type and add __CodeTy
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Sat, 05 Oct 2013 22:04:18 +0900
parents 9ad51c7bc036
children
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# RUN: llvm-mc -triple=aarch64 -disassemble < %s 2>&1 | FileCheck %s

# None of these instructions should be classified as unpredictable:

# CHECK-NOT: potentially undefined instruction encoding

# Stores from duplicated registers should be fine.
0xe3 0x0f 0x80 0xa9
# CHECK: stp x3, x3, [sp, #0]!

# d5 != x5 so "ldp d5, d6, [x5, #24]!" is fine.
0xa5 0x98 0xc1 0x6d
# CHECK: ldp d5, d6, [x5, #24]!

# xzr != sp so "stp xzr, xzr, [sp, #8]!" is fine.
0xff 0xff 0x80 0xa9
# CHECK: stp xzr, xzr, [sp, #8]!