view test/MC/Disassembler/ARM/invalid-virtexts.arm.txt @ 85:5e5d649e25d2

Update LLVM 3.7
author Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
date Thu, 19 Feb 2015 15:19:25 +0900
parents 60c9769439b8
children
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# RUN: not llvm-mc -disassemble -triple armv7a -mcpu=cortex-a15 %s 2>&1 | FileCheck --check-prefix=CHECK-ARM %s

# HVC (ARM)
[0x7f,0xff,0x4f,0xf1]
# CHECK-ARM:   warning: invalid instruction encoding

[0x70,0xff,0x4f,0x01]
[0x7f,0xff,0x4f,0xd1]
# CHECK-ARM:   warning: potentially undefined instruction encoding
# CHECK-ARM:   warning: potentially undefined instruction encoding