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view docs/AMDGPU/gfx10_dst_mimg_gather4.rst @ 148:63bd29f05246
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author | Shinji KONO <kono@ie.u-ryukyu.ac.jp> |
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date | Wed, 14 Aug 2019 19:46:37 +0900 |
parents | c2174574ed3a |
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.. ************************************************** * * * Automatically generated file, do not edit! * * * ************************************************** .. _amdgpu_synid10_dst_mimg_gather4: vdst =========================== Image data to load by an *image_gather4* instruction. *Size:* 4 data elements by default. Each data element occupies either 32 bits or 16 bits depending on :ref:`d16<amdgpu_synid_d16>`. :ref:`d16<amdgpu_synid_d16>` and :ref:`tfe<amdgpu_synid_tfe>` affect operand size as follows: * :ref:`d16<amdgpu_synid_d16>` specifies that data elements in registers are packed; each value occupies 16 bits. * :ref:`tfe<amdgpu_synid_tfe>` adds one dword if specified. *Operands:* :ref:`v<amdgpu_synid_v>`