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view test/CodeGen/AArch64/arm64-vcvtxd_f32_f64.ll @ 100:7d135dc70f03 LLVM 3.9

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents 54457678186b
children 1172e4bd9c6f
line wrap: on
line source

; RUN: llc < %s -march=arm64 | FileCheck %s

define float @fcvtxn(double %a) {
; CHECK-LABEL: fcvtxn:
; CHECK: fcvtxn s0, d0
; CHECK-NEXT: ret
  %vcvtxd.i = tail call float @llvm.aarch64.sisd.fcvtxn(double %a) nounwind
  ret float %vcvtxd.i
}

declare float @llvm.aarch64.sisd.fcvtxn(double) nounwind readnone