Mercurial > hg > CbC > CbC_llvm
view test/CodeGen/AArch64/arm64-vselect.ll @ 100:7d135dc70f03 LLVM 3.9
LLVM 3.9
author | Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp> |
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date | Tue, 26 Jan 2016 22:53:40 +0900 |
parents | 54457678186b |
children | 1172e4bd9c6f |
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; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple | FileCheck %s ;CHECK: @func63 ;CHECK: cmeq.4h v0, v0, v1 ;FIXME: currently, it will generate 3 instructions: ; ushll.4s v0, v0, #0 ; shl.4s v0, v0, #31 ; sshr.4s v0, v0, #31 ;But these instrucitons can be optimized into 1 instruction: ; sshll.4s v0, v0, #0 ;CHECK: bsl.16b v0, v2, v3 ;CHECK: str q0, [x0] ;CHECK: ret %T0_63 = type <4 x i16> %T1_63 = type <4 x i32> %T2_63 = type <4 x i1> define void @func63(%T1_63* %out, %T0_63 %v0, %T0_63 %v1, %T1_63 %v2, %T1_63 %v3) { %cond = icmp eq %T0_63 %v0, %v1 %r = select %T2_63 %cond, %T1_63 %v2, %T1_63 %v3 store %T1_63 %r, %T1_63* %out ret void }