# HG changeset patch
# User Shinji KONO <kono@ie.u-ryukyu.ac.jp>
# Date 1692265502 -32400
# Node ID c083d69c05e10de714d631a652bae32e8c2ebae7
# Parent  cfe92afade2ba05af536c6d85c43f2f69f5f793b
give up AAarch builtin-setjmp

diff -r cfe92afade2b -r c083d69c05e1 llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
--- a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp	Wed Aug 16 18:23:14 2023 +0900
+++ b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp	Thu Aug 17 18:45:02 2023 +0900
@@ -1541,61 +1541,64 @@
 
   case AArch64::Int_eh_sjlj_setjmp: {
     // Two incoming args: GPR:$src, GPR:$val
-    // add $val, pc, #8
-    // str $val, [$src, #+4]
-    // mov r0, #0
-    // add pc, pc, #0
-    // mov r0, #1
+    //  pacibsp 
+    //  stp    x21, x30, [x0]
+    //  mov    x21, x0
+    // orr    w0, wzr, #0x1
+    // mov    x1, #0x0
+    // add    x2, x21, #0xb0
+    // mov    x0, x21
+    // ldp    x21, x30, [x0]
+    // autibsp 
+    // eor    x16, x30, x30, lsl #1
+    // tbz    x16, #0x3e, 0x198c88a54   ; _setjmp
+    // brk    #0xc471
+
     Register SrcReg = MI->getOperand(0).getReg();
     Register ValReg = MI->getOperand(1).getReg();
 
     OutStreamer->AddComment("eh_setjmp begin");
-    EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::ADDri)
-      .addReg(ValReg)
-      .addReg(AArch64::PC)
-      .addImm(8)
-      // Predicate.
-      .addImm(AArch64CC::AL)
-      .addReg(0)
-      // 's' bit operand (always reg0 for this).
-      .addReg(0));
+
+    // pacibsp
+    EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::PACIBSP));
 
-    EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::STRi12)
-      .addReg(ValReg)
-      .addReg(SrcReg)
-      .addImm(4)
-      // Predicate.
-      .addImm(AArch64CC::AL)
-      .addReg(0));
+    // stp x21, x30, [x0]
+    EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::STPpre)
+        .addReg(AArch64::X21)
+        .addReg(AArch64::X30)
+        .addReg(SrcReg)
+        .addImm(0));
+
+    // mov x21, x0
+    EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::ORRXrs)
+        .addReg(AArch64::X21)
+        .addReg(SrcReg)
+        .addReg(AArch64::XZR)
+        .addImm(0));
 
-    EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::MOVi)
-      .addReg(AArch64::R0)
-      .addImm(0)
-      // Predicate.
-      .addImm(AArch64CC::AL)
-      .addReg(0)
-      // 's' bit operand (always reg0 for this).
-      .addReg(0));
+    // orr w0, wzr, #0x1
+    EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::ORRWri)
+        .addReg(AArch64::W0)
+        .addReg(AArch64::WZR)
+        .addImm(1));
 
-    EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::ADDri)
-      .addReg(AArch64::PC)
-      .addReg(AArch64::PC)
-      .addImm(0)
-      // Predicate.
-      .addImm(AArch64CC::AL)
-      .addReg(0)
-      // 's' bit operand (always reg0 for this).
-      .addReg(0));
+    // mov x1, #0x0
+    EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::MOVi)
+        .addReg(AArch64::X1)
+        .addImm(0));
+
+    // add x2, x21, #0xb0
+    EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::ADDXri)
+        .addReg(AArch64::X2)
+        .addReg(AArch64::X21)
+        .addImm(0xb0)
+        .addImm(0));
+
+    EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::BL)
+        .addExpr(MCSymbolRefExpr::create("sigprocmask", OutStreamer->getContext())));
 
     OutStreamer->AddComment("eh_setjmp end");
-    EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::MOVi)
-      .addReg(AArch64::R0)
-      .addImm(1)
-      // Predicate.
-      .addImm(AArch64CC::AL)
-      .addReg(0)
-      // 's' bit operand (always reg0 for this).
-      .addReg(0));
+
     return;
   }
   case AArch64::Int_eh_sjlj_longjmp: {
@@ -1603,6 +1606,50 @@
     // ldr $scratch, [$src, #4]
     // ldr r7, [$src]
     // bx $scratch
+
+    // libsystem_platform.dylib`longjmp:
+    //  sub    sp, sp, #0x10
+    //  mov    x21, x0
+    //  mov    x22, x1
+    // ldr    x8, [x21, #0xb0]
+    // str    x8, [sp, #0x8]
+    // orr    w0, wzr, #0x3
+    // add    x1, sp, #0x8
+    // mov    x2, #0x0
+    // bl     0x198c8d5ec               ; symbol stub for: sigprocmask
+    // ldur   x0, [x21, #0xbc]
+    // bl     0x198c8aea0               ; _sigunaltstack
+    // mov    x0, x21
+    // mov    x1, x22
+    // add    sp, sp, #0x10
+    // b      0x198c88ab4               ; _longjmp
+    //  ldp    x19, x20, [x0]
+    //  ldp    x21, x22, [x0, #0x10]
+    //  ldp    x23, x24, [x0, #0x20]
+    // ldp    x25, x26, [x0, #0x30]
+    // ldp    x27, x28, [x0, #0x40]
+    // ldp    x10, x11, [x0, #0x50]
+    // ldr    x12, [x0, #0x60]
+    // ldp    d8, d9, [x0, #0x70]
+    // ldp    d10, d11, [x0, #0x80]
+    // ldp    d12, d13, [x0, #0x90]
+    // ldp    d14, d15, [x0, #0xa0]
+    // mrs    x16, TPIDRRO_EL0
+    // ldr    x16, [x16, #0x38]
+    // eor    x10, x10, x16
+    // eor    x30, x11, x16
+    // eor    x12, x12, x16
+    // mov    w9, #0xcbed
+    // autdb  x12, x9
+    // ldr    xzr, [x12]
+    // mov    sp, x12
+    // autdb  x10, sp
+    // mov    x29, x10
+    // cmp    w1, #0x0
+    // csinc  w0, w1, wzr, ne
+    // retab  
+
+
     Register SrcReg = MI->getOperand(0).getReg();
     Register ScratchReg = MI->getOperand(1).getReg();
     EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::LDRi12)