Mercurial > hg > CbC > CbC_xv6
comparison src/impl/vm_impl_private.cbc @ 213:7a4d299a35be
paging_init
author | tobaru |
---|---|
date | Fri, 24 Jan 2020 18:10:26 +0900 |
parents | 098942ff5f44 |
children | 90b65036d9a2 |
comparison
equal
deleted
inserted
replaced
212:098942ff5f44 | 213:7a4d299a35be |
---|---|
1 #include "../../context.h" | 1 #include "../../context.h" |
2 #include "mmu.h" | 2 #include "mmu.h" |
3 #include "defs.h" | |
3 #include "memlayout.h" | 4 #include "memlayout.h" |
4 #interface "vm_impl.h" | 5 #interface "vm_impl.h" |
5 | 6 |
6 /* | 7 /* |
7 vm_impl* createvm_impl2(); | 8 vm_impl* createvm_impl2(); |
309 } | 310 } |
310 ret = (char*) p2v(PTE_ADDR(*pte)); | 311 ret = (char*) p2v(PTE_ADDR(*pte)); |
311 goto next(ret, ...); | 312 goto next(ret, ...); |
312 } | 313 } |
313 | 314 |
315 // flush all TLB | |
316 static void flush_tlb (void) | |
317 { | |
318 uint val = 0; | |
319 asm("MCR p15, 0, %[r], c8, c7, 0" : :[r]"r" (val):); | |
320 | |
321 // invalid entire data and instruction cache | |
322 asm ("MCR p15,0,%[r],c7,c10,0": :[r]"r" (val):); | |
323 asm ("MCR p15,0,%[r],c7,c11,0": :[r]"r" (val):); | |
324 } | |
325 | |
326 __code paging_intvmvm_impl(struct vm_impl* vm_impl, uint phy_low, uint phy_hi, __code next(...)) { | |
327 mappages (P2V(&_kernel_pgtbl), P2V(phy_low), phy_hi - phy_low, phy_low, AP_KU); | |
328 flush_tlb (); | |
329 | |
330 goto next(...)); | |
331 } | |
332 |