Mercurial > hg > CbC > old > device
comparison mc-code-mips.c @ 270:0c6bf0e3e475
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author | kono |
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date | Wed, 19 May 2004 12:13:00 +0900 |
parents | d9f4026de4e3 |
children | e1a96bdbe527 |
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269:d9f4026de4e3 | 270:0c6bf0e3e475 |
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6 #include "mc-code.h" | 6 #include "mc-code.h" |
7 #include "mc-codegen.h" | 7 #include "mc-codegen.h" |
8 | 8 |
9 char *l_include_path[] = { | 9 char *l_include_path[] = { |
10 "/usr/include/", | 10 "/usr/include/", |
11 "/usr/lib/gcc-lib/mipsEEel-linux/2.95.2/include/", | |
11 0 | 12 0 |
12 }; | 13 }; |
13 | 14 |
14 #define TEXT_EMIT_MODE 0 | 15 #define TEXT_EMIT_MODE 0 |
15 #define DATA_EMIT_MODE 1 | 16 #define DATA_EMIT_MODE 1 |
98 #define FREG_OFFSET REAL_MAX_REGISTER | 99 #define FREG_OFFSET REAL_MAX_REGISTER |
99 #define LREG_OFFSET (REAL_MAX_REGISTER+REAL_MAX_FREGISTER) | 100 #define LREG_OFFSET (REAL_MAX_REGISTER+REAL_MAX_FREGISTER) |
100 | 101 |
101 int MAX_INPUT_REGISTER_VAR = 4; | 102 int MAX_INPUT_REGISTER_VAR = 4; |
102 int MAX_CODE_INPUT_REGISTER_VAR = 7-MIN_TMP_REG; | 103 int MAX_CODE_INPUT_REGISTER_VAR = 7-MIN_TMP_REG; |
103 int MAX_INPUT_DREGISTER_VAR = 2; | 104 int MAX_INPUT_DREGISTER_VAR = 4; |
104 int MAX_INPUT_FREGISTER_VAR = 4; | 105 int MAX_INPUT_FREGISTER_VAR = 4; |
105 int MAX_CODE_INPUT_DREGISTER_VAR = 14-MIN_TMP_FREG; | 106 int MAX_CODE_INPUT_DREGISTER_VAR = 14-MIN_TMP_FREG; |
106 int MAX_CODE_INPUT_FREGISTER_VAR = 14-MIN_TMP_FREG; | 107 int MAX_CODE_INPUT_FREGISTER_VAR = 14-MIN_TMP_FREG; |
107 | 108 |
108 #define LREG_V 3 /* for virtual long long/double register */ | 109 #define LREG_V 3 /* for virtual long long/double register */ |
113 #define regv_h(i) regv_h0[(i)-LREG_OFFSET] | 114 #define regv_h(i) regv_h0[(i)-LREG_OFFSET] |
114 #define regv_l(i) regv_l0[(i)-LREG_OFFSET] | 115 #define regv_l(i) regv_l0[(i)-LREG_OFFSET] |
115 | 116 |
116 #define RET_REGISTER 2 | 117 #define RET_REGISTER 2 |
117 #define RET_FREGISTER FREG_OFFSET | 118 #define RET_FREGISTER FREG_OFFSET |
119 #define FREGISTER_OPERAND (FREG_OFFSET +12) | |
118 | 120 |
119 #define RET_LREGISTER (LREG_OFFSET+REAL_MAX_LREGISTER) | 121 #define RET_LREGISTER (LREG_OFFSET+REAL_MAX_LREGISTER) |
120 #define LREGISTER_OPERAND (LREG_OFFSET +REAL_MAX_LREGISTER +1) | 122 #define LREGISTER_OPERAND (LREG_OFFSET +REAL_MAX_LREGISTER +1) |
121 #define LREGISTER_OPERAND_1 (LREG_OFFSET +REAL_MAX_LREGISTER +2) | 123 #define LREGISTER_OPERAND_1 (LREG_OFFSET +REAL_MAX_LREGISTER +2) |
122 #define RET_LREGISTER_L 2 /* high word */ | 124 #define RET_LREGISTER_H 2 /* high word */ |
123 #define RET_LREGISTER_H 3 /* low word */ | 125 #define RET_LREGISTER_L 3 /* low word */ |
124 #define LREGISTER_OPERAND_H 4 /* high word */ | 126 #define LREGISTER_OPERAND_H 4 /* high word */ |
125 #define LREGISTER_OPERAND_L 5 /* low word */ | 127 #define LREGISTER_OPERAND_L 5 /* low word */ |
126 #define LREGISTER_OPERAND_1_H 6 /* high word */ | 128 #define LREGISTER_OPERAND_1_H 6 /* high word */ |
127 #define LREGISTER_OPERAND_1_L 7 /* low word */ | 129 #define LREGISTER_OPERAND_1_L 7 /* low word */ |
128 | 130 |
395 | 397 |
396 void | 398 void |
397 code_init(void) | 399 code_init(void) |
398 { | 400 { |
399 int reg; | 401 int reg; |
400 // macro_define("__BIG_ENDIAN__ 1\n"); | |
401 macro_define("__STDC__ 1\n"); | 402 macro_define("__STDC__ 1\n"); |
403 macro_define("size_t int\n"); | |
404 macro_define("__mips__ 1\n"); | |
405 macro_define("__LITTLE_ENDIAN__ 1\n"); | |
406 macro_define("__externsion__\n"); | |
407 macro_define("__flexarr\n"); | |
408 macro_define("__builtin_va_list int*\n"); | |
409 macro_define("wchar_t int\n"); | |
410 macro_define("__gnuc_va_list int*\n"); | |
411 | |
402 init_ptr_cache(); | 412 init_ptr_cache(); |
403 reg=RET_LREGISTER; | 413 reg=RET_LREGISTER; |
404 regv_l(reg) = RET_LREGISTER_L; | 414 regv_l(reg) = RET_LREGISTER_L; |
405 regv_h(reg) = RET_LREGISTER_H; | 415 regv_h(reg) = RET_LREGISTER_H; |
406 reg=LREGISTER_OPERAND; | 416 reg=LREGISTER_OPERAND; |
1250 fwddef(e3); | 1260 fwddef(e3); |
1251 } | 1261 } |
1252 | 1262 |
1253 char * | 1263 char * |
1254 code_gt(int cond) { | 1264 code_gt(int cond) { |
1255 return (cond?"eq":"ne"); | 1265 return (cond?"ne":"eq"); |
1256 } | 1266 } |
1257 | 1267 |
1258 char * | 1268 char * |
1259 code_ugt(int cond) { | 1269 code_ugt(int cond) { |
1260 return code_gt(cond); | 1270 return code_gt(cond); |
1261 } | 1271 } |
1262 | 1272 |
1263 char * | 1273 char * |
1264 code_ge(int cond) { | 1274 code_ge(int cond) { |
1265 return code_gt(!cond); | 1275 return code_gt(cond); |
1266 } | 1276 } |
1267 | 1277 |
1268 char * | 1278 char * |
1269 code_uge(int cond) { | 1279 code_uge(int cond) { |
1270 return code_gt(!cond); | 1280 return code_gt(!cond); |
1808 nargs += round4(size(t))/SIZE_OF_INT; | 1818 nargs += round4(size(t))/SIZE_OF_INT; |
1809 } else { | 1819 } else { |
1810 error(TYERR); | 1820 error(TYERR); |
1811 nargs ++ ; | 1821 nargs ++ ; |
1812 } | 1822 } |
1823 if (*preg_arg==0 && cadr(e3)) { // MIPS oddy | |
1824 t=caddr(cadr(e3)); | |
1825 if (t==LONGLONG||t==ULONGLONG||t==DOUBLE) { | |
1826 reg_arg++; | |
1827 } | |
1828 } | |
1813 *pnargs += nargs; | 1829 *pnargs += nargs; |
1814 *preg_arg += reg_arg; | 1830 *preg_arg += reg_arg; |
1815 *pfreg_arg += freg_arg; | 1831 *pfreg_arg += freg_arg; |
1816 } | 1832 } |
1817 | 1833 |
1827 } else if (reg_arg>=MAX_INPUT_REGISTER_VAR) { | 1843 } else if (reg_arg>=MAX_INPUT_REGISTER_VAR) { |
1828 return list2(LVAR,caller_arg_offset_v(nargs)); | 1844 return list2(LVAR,caller_arg_offset_v(nargs)); |
1829 } else | 1845 } else |
1830 return get_input_register_var(reg_arg,0,0); | 1846 return get_input_register_var(reg_arg,0,0); |
1831 } else if (t==LONGLONG||t==ULONGLONG) { | 1847 } else if (t==LONGLONG||t==ULONGLONG) { |
1848 if (reg_arg==1) reg_arg=2; // MIPS oddy | |
1832 if (mode==AS_SAVE) { | 1849 if (mode==AS_SAVE) { |
1833 return get_lregister_var(0); | 1850 return get_lregister_var(0); |
1834 } else if (reg_arg+1>=MAX_INPUT_REGISTER_VAR) { | 1851 } else if (reg_arg+1>=MAX_INPUT_REGISTER_VAR) { |
1835 return list2(LVAR,caller_arg_offset_v(nargs)); | 1852 return list2(LVAR,caller_arg_offset_v(nargs)); |
1836 } else | 1853 } else |
1841 } else if (freg_arg>=MAX_INPUT_DREGISTER_VAR) { | 1858 } else if (freg_arg>=MAX_INPUT_DREGISTER_VAR) { |
1842 return list2(LVAR,caller_arg_offset_v(nargs)); | 1859 return list2(LVAR,caller_arg_offset_v(nargs)); |
1843 } else | 1860 } else |
1844 return get_input_dregister_var(freg_arg,0,0,0); | 1861 return get_input_dregister_var(freg_arg,0,0,0); |
1845 } else if (t==DOUBLE) { | 1862 } else if (t==DOUBLE) { |
1863 if (reg_arg==1) reg_arg=2; // MIPS oddy | |
1846 if (mode==AS_SAVE) { | 1864 if (mode==AS_SAVE) { |
1847 return get_dregister_var(0,1); | 1865 return get_dregister_var(0,1); |
1848 } else if (reg_arg+1>=MAX_INPUT_DREGISTER_VAR) { | 1866 } else if (reg_arg+1>=MAX_INPUT_DREGISTER_VAR) { |
1849 return list2(LVAR,caller_arg_offset_v(nargs)); | 1867 return list2(LVAR,caller_arg_offset_v(nargs)); |
1850 } else | 1868 } else |
1851 return get_input_dregister_var(freg_arg,0,0,1); | 1869 return get_input_dregister_var(reg_arg,0,0,1); |
1852 } else if (t>=0&&(car(t)==STRUCT||car(t)==UNION)) { | 1870 } else if (t>=0&&(car(t)==STRUCT||car(t)==UNION)) { |
1853 if (mode==AS_SAVE) { | 1871 if (mode==AS_SAVE) { |
1854 return get_register_var(0); | 1872 return get_register_var(0); |
1855 } else | 1873 } else |
1856 return list2(LVAR,caller_arg_offset_v(nargs)); | 1874 return list2(LVAR,caller_arg_offset_v(nargs)); |
2843 } | 2861 } |
2844 | 2862 |
2845 | 2863 |
2846 void | 2864 void |
2847 code_set_return_register(int mode) { | 2865 code_set_return_register(int mode) { |
2848 if (cadr(fnptr->ty)==DOUBLE||cadr(fnptr->ty)==FLOAT) { | 2866 if (cadr(fnptr->ty)==FLOAT) { |
2849 set_freg(RET_FREGISTER,mode); | 2867 set_freg(RET_FREGISTER,mode); |
2868 } else if (cadr(fnptr->ty)==DOUBLE) { | |
2869 set_dreg(RET_DREGISTER,mode); | |
2850 } else if (cadr(fnptr->ty)==LONGLONG||cadr(fnptr->ty)==ULONGLONG) { | 2870 } else if (cadr(fnptr->ty)==LONGLONG||cadr(fnptr->ty)==ULONGLONG) { |
2851 set_lreg(RET_LREGISTER,mode); | 2871 set_lreg(RET_LREGISTER,mode); |
2852 } else if (cadr(fnptr->ty)==VOID) { | 2872 } else if (cadr(fnptr->ty)==VOID) { |
2853 } else { | 2873 } else { |
2854 set_ireg(RET_REGISTER,mode); | 2874 set_ireg(RET_REGISTER,mode); |
3192 double value = dcadr(e2); | 3212 double value = dcadr(e2); |
3193 char *frn; | 3213 char *frn; |
3194 | 3214 |
3195 use_float(d,freg); | 3215 use_float(d,freg); |
3196 if (d) { | 3216 if (d) { |
3197 printf("\tli %s,0x%x\n",lregister_name_high(freg),code_d2(value)); | 3217 printf("\tli %s,0x%x\n",lregister_name_high(freg),code_d1(value)); |
3198 printf("\tli %s,0x%x\n",lregister_name_low(freg),code_d1(value)); | 3218 printf("\tli %s,0x%x\n",lregister_name_low(freg),code_d2(value)); |
3199 } else { | 3219 } else { |
3200 frn = fregister_name(freg); | 3220 frn = fregister_name(freg); |
3201 printf("\tli.s %s,%g\n",frn,value); | 3221 printf("\tli.s %s,%g\n",frn,value); |
3202 } | 3222 } |
3203 } | 3223 } |
3281 return; | 3301 return; |
3282 } | 3302 } |
3283 | 3303 |
3284 void | 3304 void |
3285 code_f2d(int reg) { | 3305 code_f2d(int reg) { |
3286 set_freg(RET_FREGISTER,1); | 3306 set_freg(FREGISTER_OPERAND,1); |
3287 code_save_stacks(); | 3307 code_save_stacks(); |
3288 clear_ptr_cache(); | 3308 clear_ptr_cache(); |
3289 extern_conv("fptodp"); | 3309 extern_conv("fptodp"); |
3290 set_dreg(RET_DREGISTER,0); | 3310 set_dreg(RET_DREGISTER,0); |
3291 use_float(1,reg); | 3311 use_float(1,reg); |
4090 | 4110 |
4091 void | 4111 void |
4092 code_lconst(int e1,int creg) | 4112 code_lconst(int e1,int creg) |
4093 { | 4113 { |
4094 use_longlong(creg); | 4114 use_longlong(creg); |
4095 code_const(code_l1(lcadr(e1)),regv_l(creg)); | 4115 code_const(code_l1(lcadr(e1)),regv_h(creg)); |
4096 code_const(code_l2(lcadr(e1)),regv_h(creg)); | 4116 code_const(code_l2(lcadr(e1)),regv_l(creg)); |
4097 } | 4117 } |
4098 | 4118 |
4099 void | 4119 void |
4100 code_lneg(int creg) | 4120 code_lneg(int creg) |
4101 { | 4121 { |