--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/test/asm-powerpc.c	Sat Jun 19 00:13:36 2004 +0900
@@ -0,0 +1,412 @@
+#define const
+
+typedef unsigned short __u16;
+typedef unsigned int __u32;
+
+struct task_struct {
+        volatile long state;
+        int usage;
+        unsigned long flags;
+        unsigned long ptrace;
+} c0;
+
+// register struct task_struct *current asm ("r2");
+typedef struct { volatile int counter; } atomic_t;
+
+struct thread_info {
+        struct task_struct *task;
+/*
+        struct exec_domain *exec_domain;
+        unsigned long flags;
+        unsigned long local_flags;
+        int cpu;
+        int preempt_count;
+        struct restart_block restart_block;
+ */
+};
+
+struct page {
+        int flags;
+        atomic_t count;
+};
+
+struct dentry {
+        atomic_t *d_count;
+        unsigned long d_vfs_flags;
+        int d_lock;
+};
+
+int t;
+__u16 result;
+__u32 result32;
+unsigned long old;
+unsigned long mask;
+unsigned long *p ;
+const unsigned long *b;
+unsigned long msr;
+unsigned val;
+unsigned short *addr;
+__u16 value;
+ atomic_t *v;
+int a;
+int lz;
+int owner;
+unsigned long x;
+struct thread_info *ti;
+unsigned long prev;
+int old1; int new;
+unsigned long ret;
+unsigned long size;
+struct dentry *dentry;
+unsigned long flags;
+unsigned long tmp;
+unsigned long clr;
+unsigned long set;
+unsigned int sum;
+struct page *page;
+ unsigned int offset;
+int *sk_owner ;
+unsigned long saddr;
+unsigned long daddr;
+unsigned short len;
+unsigned short proto;
+unsigned int rval;
+
+
+
+
+
+
+main()
+{
+
+
+
+        __asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr));
+
+        __asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
+
+
+        __asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr));
+
+        __asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
+
+
+        __asm__("rlwimi %0,%2,8,16,23" : "=&r" (result) : "0" (value >> 8), "r" (value));
+
+
+        __asm__("rlwimi %0,%2,24,16,23" : "=&r" (result) : "0" (value>>24), "r" (value));
+        __asm__("rlwimi %0,%2,8,8,15" : "=&r" (result) : "0" (result), "r" (value));
+        __asm__("rlwimi %0,%2,24,0,7" : "=&r" (result) : "0" (result), "r" (value));
+
+
+        __asm__ __volatile__(
+"1:	lwarx	%0,0,%3		\n	add	%0,%2,%0\n"
+
+       
+"	stwcx.	%0,0,%3 \n	bne-	1b"
+
+        : "=&r" (t), "=m" (v->counter)
+        : "r" (a), "r" (&v->counter), "m" (v->counter)
+        : "cc");
+
+
+        __asm__ __volatile__(
+"1:	lwarx	%0,0,%2		\n	add	%0,%1,%0\n"
+
+       
+"	stwcx.	%0,0,%2 \n	bne-	1b"
+
+       
+        : "=&r" (t)
+        : "r" (a), "r" (&v->counter)
+        : "cc", "memory");
+
+
+
+
+        __asm__ __volatile__(
+"1:	lwarx	%0,0,%3		\n	subf	%0,%2,%0\n"
+
+       
+"	stwcx.	%0,0,%3 \n	bne-	1b"
+
+        : "=&r" (t), "=m" (v->counter)
+        : "r" (a), "r" (&v->counter), "m" (v->counter)
+        : "cc");
+
+
+        __asm__ __volatile__(
+"1:	lwarx	%0,0,%2		\n	subf	%0,%1,%0\n"
+
+       
+"	stwcx.	%0,0,%2 \n	bne-	1b"
+
+       
+        : "=&r" (t)
+        : "r" (a), "r" (&v->counter)
+        : "cc", "memory");
+
+
+
+        __asm__ __volatile__(
+"1:	lwarx	%0,0,%2		\n	addic	%0,%0,1\n"
+
+       
+"	stwcx.	%0,0,%2 \n	bne-	1b"
+
+        : "=&r" (t), "=m" (v->counter)
+        : "r" (&v->counter), "m" (v->counter)
+        : "cc");
+
+
+        __asm__ __volatile__(
+"1:	lwarx	%0,0,%1		\n	addic	%0,%0,1\n"
+
+       
+"	stwcx.	%0,0,%1 \n	bne-	1b"
+
+       
+        : "=&r" (t)
+        : "r" (&v->counter)
+        : "cc", "memory");
+
+
+
+        __asm__ __volatile__(
+"1:	lwarx	%0,0,%2		\n	addic	%0,%0,-1\n"
+
+        "	stwcx.	%0,0,%2\n	bne-	1b"
+
+
+        : "=&r" (t), "=m" (v->counter)
+        : "r" (&v->counter), "m" (v->counter)
+        : "cc");
+
+
+        __asm__ __volatile__(
+"1:	lwarx	%0,0,%1		\n	addic	%0,%0,-1\n"
+
+       
+"	stwcx.	%0,0,%1\n	bne-	1b"
+
+       
+        : "=&r" (t)
+        : "r" (&v->counter)
+        : "cc", "memory");
+
+
+        __asm__ __volatile__(
+"1:	lwarx	%0,0,%1		\n	addic.	%0,%0,-1\n	blt-	2f\n"
+
+
+       
+"	stwcx.	%0,0,%1\n	bne-	1b"
+
+       
+        "\n2:" : "=&r" (t)
+
+        : "r" (&v->counter)
+        : "cc", "memory");
+
+
+        __asm__ __volatile__("\n1:	lwarx	%0,0,%3 \n	or	%0,%0,%2 \n"
+
+
+       
+"	stwcx.	%0,0,%3 \n	bne-	1b"
+
+        : "=&r" (old), "=m" (*p)
+        : "r" (mask), "r" (p), "m" (*p)
+        : "cc" );
+
+
+        __asm__ __volatile__("\n1:	lwarx	%0,0,%3 \n	andc	%0,%0,%2 \n"
+
+
+       
+"	stwcx.	%0,0,%3 \n	bne-	1b"
+
+        : "=&r" (old), "=m" (*p)
+        : "r" (mask), "r" (p), "m" (*p)
+        : "cc");
+
+
+
+        __asm__ __volatile__("\n1:	lwarx	%0,0,%3 \n	xor	%0,%0,%2 \n"
+
+
+       
+"	stwcx.	%0,0,%3 \n	bne-	1b"
+
+        : "=&r" (old), "=m" (*p)
+        : "r" (mask), "r" (p), "m" (*p)
+        : "cc");
+
+
+
+
+        __asm__ __volatile__( "\n1:	lwarx	%0,0,%4 \n	or	%1,%0,%3 \n"
+
+
+       
+"	stwcx.	%1,0,%4 \n	bne	1b"
+
+       
+        : "=&r" (old), "=&r" (t), "=m" (*p)
+        : "r" (mask), "r" (p), "m" (*p)
+        : "cc", "memory");
+
+
+
+
+        __asm__ __volatile__( "\n1:	lwarx	%0,0,%4 \n	andc	%1,%0,%3 \n"
+
+
+       
+"	stwcx.	%1,0,%4 \n	bne	1b"
+
+       
+        : "=&r" (old), "=&r" (t), "=m" (*p)
+        : "r" (mask), "r" (p), "m" (*p)
+        : "cc", "memory");
+
+
+        __asm__ __volatile__( "\n1:	lwarx	%0,0,%4 \n	xor	%1,%0,%3 \n"
+
+
+       
+"	stwcx.	%1,0,%4 \n	bne	1b"
+
+       
+        : "=&r" (old), "=&r" (t), "=m" (*p)
+        : "r" (mask), "r" (p), "m" (*p)
+        : "cc", "memory");
+
+        asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x));
+        asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x));
+#if 0
+        if (__builtin_expect(!!(b[0]), 0))
+                return 0;
+#endif
+
+        // __asm__("rlwinm %0,1,0,0,18" : "=r"(ti));
+
+
+
+
+         __asm__ __volatile__ ("dcbt 0,%0" : : "r" (x));
+         __asm__ __volatile__ ("dcbtst 0,%0" : : "r" (x));
+        msr = ({ asm volatile("mfmsr %0" : "=r" (rval)); rval;});
+        asm volatile("mtmsr %0" : : "r" (msr & ~(1<<15)));
+        __asm__ __volatile__("": : :"memory");
+
+        __asm__ __volatile__("": : :"memory");
+        msr = ({ asm volatile("mfmsr %0" : "=r" (rval)); rval;});
+        asm volatile("mtmsr %0" : : "r" (msr | (1<<15)));
+
+        msr = ({ asm volatile("mfmsr %0" : "=r" (rval)); rval;});
+        asm volatile("mtmsr %0" : : "r" (msr & ~(1<<15)));
+        __asm__ __volatile__("": : :"memory");
+
+        __asm__ __volatile__ ("\n1:	lwarx	%0,0,%2 \n"
+
+       
+"	stwcx.	%3,0,%2 \n	bne-	1b"
+
+        : "=&r" (prev), "=m" (*(volatile unsigned long *)p)
+        : "r" (p), "r" (val), "m" (*(volatile unsigned long *)p)
+        : "cc", "memory");
+
+        __asm__ __volatile__ ("\n1:	lwarx	%0,0,%2 \n	cmpw	0,%0,%3 \n	bne	2f \n"
+
+
+
+       
+"	stwcx.	%4,0,%2 \n	bne-	1b\n"
+
+
+
+
+"2:"
+        : "=&r" (prev), "=m" (*p)
+        : "r" (p), "r" (old1), "r" (new), "m" (*p)
+        : "cc", "memory");
+
+
+        __asm__ __volatile__(
+                "2:	mftb %0\n"
+                "3:\n"
+                ".section __ftr_fixup,\"a\"\n"
+                "	.long %1\n"
+                "	.long 0\n"
+                "	.long 2b\n"
+                "	.long 3b\n"
+                ".text"
+                : "=r" (ret) : "i" (0x00000100));
+        __asm__ __volatile__("": : :"memory");
+        asm ("cntlzw %0,%1" : "=r" (lz) : "r" (size));
+
+
+
+  do { asm volatile("mtmsr %0" : : "r" (flags)); do { } while (0); } while (0);
+
+                do { __asm__ __volatile__( 
+	"1:	twnei %0,0\n" 
+	".section __bug_table,\"a\"\n\t" 
+	"	.long 1b,%1,%2,%3\n" ".text" : : 
+	"r" (!((dentry->d_count)
+		->counter)), 
+	"i" (273), 
+	"i" ("../../include/linux/dcache.h"), 
+	"i" ((__func__))); } while (0);
+        __asm__ __volatile__("1:	lwarx	%0,0,%3\n	andc	%1,%0,%4\n	or	%1,%1,%5\n"
+
+
+
+       
+"	stwcx.	%1,0,%3\n	bne-	1b"
+
+        : "=&r" (old1), "=&r" (tmp), "=m" (*p)
+        : "r" ((unsigned long)(p+1) - 4), "r" (clr), "r" (set), "m" (*p)
+        : "cc" );
+
+        if (({ do { __asm__ __volatile__( "1:	twnei %0,0\n" ".section __bug_table,\"a\"\n\t" "	.long 1b,%1,%2,%3\n" ".text" : : "r" (((&(page)->count)->counter) == 0), "i" (284), "i" ("../../include/linux/mm.h"), "i" ((__func__))); } while (0); (atomic_dec_return((&(page)->count)) == 0); }))
+        return 0;
+
+        do { __asm__ __volatile__( "1:	twnei %0,0\n" ".section __bug_table,\"a\"\n\t" "	.long 1b,%1,%2,%3\n" ".text" : : "r" (offset + size > (1UL << 12)), "i" (59), "i" ("../../include/linux/highmem.h"), "i" ((__func__))); } while (0);
+
+	asm volatile("mtmsr %0" : : "r" (flags)); 
+
+                asm volatile("mtmsr %0" : : "r" (flags));
+
+        if (((({ asm volatile("mfmsr %0" : "=r" (rval)); rval;}) & (1<<15)) == 0))
+	    return 0;
+
+        __asm__ __volatile__("": : :"memory");
+
+
+                do { __asm__ __volatile__( "1:	twnei %0,0\n" ".section __bug_table,\"a\"\n\t" "	.long 1b,%1,%2,%3\n" ".text" : : "r" ((v->counter) == 1), "i" (333 + 0x1000000), "i" ("../../include/net/sock.h"), "i" ((__func__))); } while (0);
+
+        do { __asm__ __volatile__( "1:	twnei %0,0\n" ".section __bug_table,\"a\"\n\t" "	.long 1b,%1,%2,%3\n" ".text" : : "r" (sk_owner != ((void *)0)), "i" (476), "i" ("../../include/net/sock.h"), "i" ((__func__))); } while (0);
+
+        do { __asm__ __volatile__( "1:	twnei %0,0\n" ".section __bug_table,\"a\"\n\t" "	.long 1b,%1,%2,%3\n" ".text" : : "r" (sizeof(struct page) > (24 * sizeof(long))), "i" (523), "i" ("../../include/net/sock.h"), "i" ((__func__))); } while (0);
+
+
+
+        __asm__("rlwinm %0,%1,16,0,31" : "=r" (tmp) : "r" (sum));
+
+    __asm__("\n	addc %0,%0,%1 \n	adde %0,%0,%2 \n	adde %0,%0,%3 \n	addze %0,%0 \n	"
+
+
+
+
+
+        : "=r" (sum)
+        : "r" (daddr), "r"(saddr), "r"((proto<<16)+len), "0"(sum));
+
+
+        do { __asm__ __volatile__( "1:	twnei %0,0\n" ".section __bug_table,\"a\"\n\t" "	.long 1b,%1,%2,%3\n" ".text" : : "r" ((tmp) != 0x00000001), "i" (231), "i" ("../../include/linux/crypto.h"), "i" ((__func__))); } while (0);
+
+
+}