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annotate a13/smv/test4.smv @ 407:c7ad8d2dc157

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safe halt.agda
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Thu, 09 Nov 2023 18:04:55 +0900
parents 0e8a0e50ed26
children
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Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
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1 MODULE inverter(input)
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Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
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2 VAR
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Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
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3 output : boolean;
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Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
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4 ASSIGN
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Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
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5 init(output) := FALSE;
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Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
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6 next(output) := (!input) union output;
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Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
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7 MODULE main
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Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
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8 VAR
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Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
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9 gate1 : inverter(gate3.output);
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Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
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10 gate2 : inverter(gate1.output);
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Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
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11 gate3 : inverter(gate2.output);