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author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Sat, 23 Nov 2019 12:59:45 +0900
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children 3be1afb87f82
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MODULE main
VAR
  y : 0..15;
ASSIGN
  init(y) := 0;
TRANS
  case
    y=7: next(y)=0;
    TRUE : next(y) = ((y + 1) mod 16);
  esac
LTLSPEC G ( y=4 -> X y=6 )