annotate defs/ide.d @ 3140:03b580a02945

Allow CoCo3FPGA-specific build of superdesc.asm Added new conditional CC3FPGA and code to "level1/modules/superdesc.asm" to reflect changes needed to build the new SD card descriptors for the Coco3FPGA.
author Bill Pierce <merlinious999@gmail.com>
date Sat, 04 Feb 2017 11:06:26 +0100
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1 IFNE IDE.D-1
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2 IDE.D SET 1
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3 ********************************************************************
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4 * ide.d - IDE definitions
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5 *
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6 * $Id$
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7 *
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8 * (C) 2004 Boisy G. Pitre - Licensed to Cloud-9
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9 *
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10 * Edt/Rev YYYY/MM/DD Modified by
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11 * Comment
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12 * ------------------------------------------------------------------
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13 * 2005/12/11 Boisy G. Pitre
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14 * Moved IDE base addresses and I/O offsets to here.
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15
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16 *
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17 * ATAPI Commands
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18 *
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19 A$READ2 EQU $A8
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20 A$WRITE2 EQU $AA
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21 A$READ EQU $28
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22 A$WRITE EQU $2A
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23 A$STOP EQU $1B
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24
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25 *
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26 * ATA Commands
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27 *
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28 S$READ EQU $20
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29 S$WRITE EQU $30
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30
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31 *
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32 * IDE Registers
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33 *
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34 DataReg EQU 0 Data (1st 8 bits, non-latched)
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35 ErrorReg EQU 1 Error # when read
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36 Features EQU 1 Features when write
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37 SectCnt EQU 2 Sector count
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38 SectNum EQU 3 Sector #
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39 CylLow EQU 4 Low byte of cylinder
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40 CylHigh EQU 5 High byte of cylinder
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41 DevHead EQU 6 Device/Head
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42 Status EQU 7 Status when read
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43 Command EQU 7 Command when write
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44 Latch EQU 8 Latch (2nd 8 bits of 16 bit word)
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45
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46 BusyBit EQU %10000000 BUSY=1
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47 DrdyBit EQU %01000000 drive ready=1
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48 DscBit EQU %00010000 seek finished=1
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49 DrqBit EQU %00001000 data requested=1
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50 ErrBit EQU %00000001 error_reg has it
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51 RdyTrk EQU %01010000 ready & over track
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52 RdyDrq EQU %01011000 ready w/ data
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53
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54 **** IDE Interface Definitions
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55 IFNE IDE
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56 SDAddr SET $FF50
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57 ENDC
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59 ENDC
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