annotate level1/modules/dw4write.asm @ 2662:07cc32e3d96f

More fixes
author Boisy Pitre <boisy.pitre@nuance.com>
date Fri, 13 Jul 2012 23:11:00 -0500
parents b839b516cb35
children d1976224b314
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rev   line source
2602
b839b516cb35 Inverted conditionals
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1 IFEQ H6309-1
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2
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3 *******************************************************
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4 *
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5 * DWWrite - 6309 native Turbo Edition 115k / 230k
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6 * Send a packet to the DriveWire server.
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7 * Serial data format: 8-N-2
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8 *
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9 * Entry:
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10 * X = address of the data to be sent
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11 * Y = number of bytes to send
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12 *
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13 * Exit:
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14 * X = address of last byte sent + 1
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15 * Y = 0
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16 * All others preserved
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17 *
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18 BBOUT equ $FF20 ; bit banger output port
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19
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20 DWWrite pshs u,d,cc ; preserve registers
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21 orcc #$50 ; mask interrupts
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22 ldu #BBOUT ; point U to output port
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23 aim #$F7,3,u ; disable sound output
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24
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25 * Wait for serial input line to become idle
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26 wait1 lda 2,u ; sample input
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27 ldb #$80 ; setup ACCB as a shift counter
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28 wait2 eora 2,u ; look for changing input
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29 lsra ; shift 'changed' bit into Carry
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30 lda 2,u ; sample input
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31 rorb ; rotate 'changed' bit into ACCB
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32 bcc wait2 ; loop for 8 samples
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33 bne wait1 ; try again if changes seen in the input
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34
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35 * Byte transmitter loop
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36 incb ; ACCB = 1 (start bit / byte incrementor)
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37 txByte lda ,x ; get data byte
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38 stb ,u ; send start bit
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39 asla ; move bit 0 into position
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40 abx ; increment data ptr
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41 sta ,u++ ; bit 0
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42 rora
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43 nop
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44 sta ,--u ; bit 1
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45 lsra
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46 sta ,u++ ; bit 2
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47 lsra
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48 nop
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49 sta ,--u ; bit 3
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50 lsra
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51 nop
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52 sta ,u++ ; bit 4
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53 lsra
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54 nop
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55 sta ,--u ; bit 5
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56 lsra
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57 sta ,u++ ; bit 6
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58 lsra
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59 aslb ; ACCB = 2 (stop bit)
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60 sta ,--u ; bit 7
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61 leau ,u
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62 stb ,u ; send stop bit
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63 lsrb ; ACCB = 1 (start bit / byte incrementor)
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64 leay -1,y ; decrement counter
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65 bne txByte ; loop if more bytes to send
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66
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67 puls cc,d,u,pc ; restore registers and return
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68
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69 ELSE
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70
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71 *******************************************************
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72 *
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73 * DWWrite - 6809 Turbo Edition 115k / 230k
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74 * Send a packet to the DriveWire server.
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75 * Serial data format: 8-N-2
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76 *
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77 * Entry:
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78 * X = address of the data to be sent
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79 * Y = number of bytes to send
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80 *
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81 * Exit:
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82 * X = address of last byte sent + 1
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83 * Y = 0
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84 * All others preserved
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85 *
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86 *BBOUT equ $FF20 ; bit banger output port
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87
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88 DWWrite pshs u,d,cc ; preserve registers
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89 orcc #$50 ; mask interrupts
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90 ldu #BBOUT ; point U to output port
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91 lda 3,u ; read PIA 1-B control register
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92 anda #$F7 ; clear sound enable bit
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93 sta 3,u ; disable sound output
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94
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95 * Wait for serial input line to become idle
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96 wait1 lda 2,u ; sample input
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97 ldb #$80 ; setup ACCB as a shift counter
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98 wait2 eora 2,u ; look for changing input
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99 lsra ; shift 'changed' bit into Carry
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100 lda 2,u ; sample input
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101 rorb ; rotate 'changed' bit into ACCB
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102 bcc wait2 ; loop for 8 samples
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103 bne wait1 ; try again if changes seen in the input
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104
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105 * Byte transmitter loop
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106 ldb #2
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107 lda ,x ; retrieve first byte from buffer
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108 txByte decb ; ACCB = 1 (start bit / byte incrementor)
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109 abx ; increment data ptr
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110 stb ,u ; send start bit
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111 asla ; move bit 0 into position
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112 nop
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113 sta ,u ; bit 0
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114 rora
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115 sta ,u+ ; bit 1
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116 lsra
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117 sta -1,u ; bit 2
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118 lsra
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119 sta ,-u ; bit 3
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120 lsra
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121 incb ; ACCB = 2 (stop bit)
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122 sta ,u ; bit 4
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123 lsra
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124 sta ,u+ ; bit 5
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125 lsra
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126 sta -1,u ; bit 6
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127 lsra
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128 sta ,-u ; bit 7
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129 lda ,x ; fetch next byte
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130 stb ,u ; send stop bit
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131 leay -1,y ; decrement counter
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132 bne txByte ; loop if more bytes to send
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133
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134 puls cc,d,u,pc ; restore registers and return
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135
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136 ENDC