Mercurial > hg > Members > kono > nitros9-code
annotate defs/coco.d @ 3285:345ff5806dd7
Correct coco.d filename in shipped Defsfile files
It seems that 8 years ago in commit 2624:b8c7b7fbf3c9 the coco defs were put into a
new "coco.d" (from "systype"), and the various level*/<port>/defsfile were updated.
However, the level*/<port>/defs/Defsfile (that are copied to the disk images under
DEFS) were apparently wrongly updated.
author | hpmachining <aur@hpminc.com> |
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date | Thu, 18 Jun 2020 20:29:32 +0200 |
parents | f248546159b7 |
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rev | line source |
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2624 | 1 IFNE COCO.D-1 |
2 COCO.D SET 1 | |
3 | |
4 ******************************************************************** | |
5 * CoCoDefs - NitrOS-9 System Definitions for the Tandy Color Computer | |
6 * | |
7 * $Id$ | |
8 * | |
9 * Edt/Rev YYYY/MM/DD Modified by | |
10 * Comment | |
11 * ------------------------------------------------------------------ | |
12 * 1998/10/13 Boisy G. Pitre | |
13 * Added defs by Bruce Isted from his Eliminator archive. | |
14 * | |
15 * 1998/10/31 Boisy G. Pitre | |
16 * Merged cc3global.defs into this file. | |
17 * | |
18 * 2002/04/30 Boisy G. Pitre | |
19 * Merged Level One and Level Two sysdefs. | |
20 * | |
21 * 2002/06/22 Boisy G. Pitre | |
22 * Removed PIA.U4 and PIA.U8, improved comments | |
23 * | |
24 * 2003/11/05 Robert Gault | |
25 * Made changes in window globals and grfdrv memory to handle regW | |
26 * in 6809 systems. | |
27 * | |
28 * 2003/11/30 Boisy G. Pitre | |
29 * Statics now are prefaced with V. to identify them easier in source. | |
30 * | |
31 * 2004/07/18 Boisy G. Pitre | |
32 * Moved CoCo 3 Window stuff into cc3iodefs | |
33 * | |
34 * 2012/02/24 Boisy G. Pitre | |
35 * Consolidated all CoCo-specific defs files into here. | |
36 | |
37 NAM CoCoDefs | |
38 IFEQ Level-1 | |
39 TTL NitrOS-9 System Definitions for the Tandy Color Computer | |
40 ELSE | |
41 IFEQ Level-2 | |
42 TTL NitrOS-9 Level 2 System Type Definitions | |
43 ELSE | |
44 IFEQ Level-3 | |
45 TTL NitrOS-9 Level 3 System Type Definitions | |
46 ENDC | |
47 ENDC | |
48 ENDC | |
49 | |
50 | |
51 ********************** | |
52 * CPU Type Definitions | |
53 * | |
54 Color SET 1 | |
55 Color3 SET 2 | |
56 IFEQ Level-1 | |
57 CPUType SET Color | |
58 ELSE | |
59 CPUType SET Color3 | |
60 ENDC | |
61 | |
62 | |
63 ****************************** | |
64 * Clock Speed Type Definitions | |
65 * | |
66 OneMHz EQU 1 | |
67 TwoMHz EQU 2 | |
68 IFEQ CPUType-Color | |
69 CPUSpeed SET OneMHz | |
70 ELSE | |
71 CPUSpeed SET TwoMHz | |
72 ENDC | |
73 | |
74 | |
75 ********************************** | |
76 * Power Line Frequency Definitions | |
77 * | |
78 Hz50 EQU 1 Assemble clock for 50 hz power | |
79 Hz60 EQU 2 Assemble clock for 60 hz power | |
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80 IFNDEF PwrLnFrq |
2624 | 81 PwrLnFrq SET Hz60 Set to Appropriate freq |
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82 ENDC |
2624 | 83 |
84 | |
85 ********************************** | |
86 * Ticks per second | |
87 * | |
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88 IFNDEF TkPerSec |
2624 | 89 IFEQ PwrLnFrq-Hz50 |
90 TkPerSec SET 50 | |
91 ELSE | |
92 TkPerSec SET 60 | |
93 ENDC | |
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94 ENDC |
2624 | 95 |
96 | |
97 ****************** | |
98 * ACIA type set up | |
99 * | |
100 ORG 1 | |
101 ACIA6850 RMB 1 MC6850 acia. | |
102 ACIA6551 RMB 1 SY6551 acia. | |
103 ACIA2661 RMB 1 SC2661 acia. | |
104 ACIATYPE SET ACIA6551 | |
105 | |
106 | |
107 **************************************** | |
108 * Special character Bit position equates | |
109 * | |
110 SHIFTBIT EQU %00000001 | |
111 CNTRLBIT EQU %00000010 | |
112 ALTERBIT EQU %00000100 | |
113 UPBIT EQU %00001000 | |
114 DOWNBIT EQU %00010000 | |
115 LEFTBIT EQU %00100000 | |
116 RIGHTBIT EQU %01000000 | |
117 SPACEBIT EQU %10000000 | |
118 | |
119 | |
120 ****************** | |
121 * Device addresses for miscellaneous hardware | |
122 * | |
123 A.AciaP SET $FF68 Aciapak Address | |
124 A.ModP SET $FF6C ModPak Address | |
125 DPort SET $FF40 Disk controller base address | |
126 MPI.Slct SET $FF7F Multi-Pak slot select | |
127 MPI.Slot SET $03 Multi-Pak default slot | |
128 PIA0Base EQU $FF00 | |
129 PIA1Base EQU $FF20 | |
130 | |
131 | |
132 ****************** | |
133 * VDG Devices | |
134 * | |
135 A.TermV SET $FFC0 VDG Term | |
136 A.V1 SET $FFC1 Possible additional VDG Devices | |
137 A.V2 SET $FFC2 | |
138 A.V3 SET $FFC3 | |
139 A.V4 SET $FFC4 | |
140 A.V5 SET $FFC5 | |
141 A.V6 SET $FFC6 | |
142 A.V7 SET $FFC7 | |
143 | |
144 | |
145 IFEQ Level-1 | |
146 | |
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147 ******************************** |
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148 * Boot defs for NitrOS-9 Level 1 |
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149 * |
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150 * These defs are not strictly for 'Boot', but are for booting the |
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151 * system. |
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152 * |
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153 Bt.Start EQU $EE00 Start address of the boot track in memory |
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154 |
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155 ELSE |
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156 |
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157 ****************************************** |
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158 * Boot defs for NitrOS-9 Level 2 and above |
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159 * |
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160 * These defs are not strictly for 'Boot', but are for booting the |
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161 * system. |
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162 * |
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163 Bt.Start SET $ED00 Start address of the boot track in memory |
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164 Bt.Block EQU $3B Block to map in for the 'OS9BOOT' screen |
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165 Bt.Flag EQU $8A34 Flag in Bt.Block to verify that it's unchanged |
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166 Bt.Offst EQU 2 Offset into the screen where the current ptr is |
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167 |
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168 ENDC |
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169 |
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170 * On the CoCo, the boot track is all of track 34 |
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171 |
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172 Bt.Track EQU 34 Boot track |
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173 Bt.Sec EQU 0 Start LSN of boot area on boot track |
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174 |
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175 |
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176 Bt.Size EQU $1080 Maximum size of bootfile |
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177 |
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178 |
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179 IFEQ Level-1 |
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180 |
2624 | 181 ************************************************* |
182 * | |
183 * NitrOS-9 Level 1 Section | |
184 * | |
185 ************************************************* | |
186 | |
187 HW.Page SET $FF Device descriptor hardware page | |
188 | |
189 ELSE | |
190 | |
191 ************************************************* | |
192 * | |
193 * NitrOS-9 Level 2 Section | |
194 * | |
195 ************************************************* | |
196 | |
197 **************************************** | |
198 * Dynamic Address Translator Definitions | |
199 * | |
200 DAT.BlCt EQU 8 D.A.T. blocks/address space | |
201 DAT.BlSz EQU (256/DAT.BlCt)*256 D.A.T. block size | |
202 DAT.ImSz EQU DAT.BlCt*2 D.A.T. Image size | |
203 DAT.Addr EQU -(DAT.BlSz/256) D.A.T. MSB Address bits | |
204 DAT.Task EQU $FF91 Task Register address | |
205 DAT.TkCt EQU 32 Number of DAT Tasks | |
206 DAT.Regs EQU $FFA0 DAT Block Registers base address | |
207 DAT.Free EQU $333E Free Block Number | |
208 DAT.BlMx EQU $3F Maximum Block number | |
209 DAT.BMSz EQU $40 Memory Block Map size | |
210 DAT.WrPr EQU 0 no write protect | |
211 DAT.WrEn EQU 0 no write enable | |
212 SysTask EQU 0 Coco System Task number | |
213 IOBlock EQU $3F | |
214 ROMBlock EQU $3F | |
215 IOAddr EQU $7F | |
216 ROMCount EQU 1 number of blocks of ROM (High RAM Block) | |
217 RAMCount EQU 1 initial blocks of RAM | |
218 MoveBlks EQU DAT.BlCt-ROMCount-2 Block numbers used for copies | |
219 BlockTyp EQU 1 chk only first bytes of RAM block | |
220 ByteType EQU 2 chk entire block of RAM | |
221 Limited EQU 1 chk only upper memory for ROM modules | |
222 UnLimitd EQU 2 chk all NotRAM for modules | |
223 * NOTE: this check assumes any NotRAM with a module will | |
224 * always start with $87CD in first two bytes of block | |
225 RAMCheck EQU BlockTyp chk only beg bytes of block | |
226 ROMCheck EQU Limited chk only upper few blocks for ROM | |
227 LastRAM EQU IOBlock maximum RAM block number | |
228 | |
229 *************************** | |
230 * Color Computer 3 Specific | |
231 * | |
232 MappedIO EQU true (Actually False but it works better this way) | |
233 | |
234 ******************** | |
235 * Hardware addresses | |
236 * | |
237 GIMERegs EQU $FF00 Base address of GIME registers | |
238 IrqEnR EQU $FF92 GIME IRQ enable/status register | |
239 BordReg EQU $FF9A Border color register | |
240 PalAdr EQU $FFB0 Palette registers | |
241 | |
242 HW.Page SET $07 Device descriptor hardware page | |
243 | |
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244 * KrnBlk defines the block number of the 8K RAM block that is mapped to |
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245 * the top of CPU address space ($E000-$FFFF) for the system process, and |
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246 * which holds the Kernel. The top 2 pages of this CPU address space ($FFE0- |
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247 * $FFFF) has two special properties. Firstly, it contains the I/O space. |
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248 * Secondly, the parts that contain RAM map are not affected by the DAT |
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249 * mappings but, instead, *always* map that RAM to a fixed RAM block |
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250 * (KrnBlk). When a user process is mapped in, and requests enough memory, |
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251 * it will end up with its own block assigned for CPU address space $E000- |
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252 * $FFFF but the top of the address space is unusable by the user process: |
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253 * it still contains the I/O and the bit of RAM that's mapped to KrnBlk. |
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254 * Usually, the value of KrnBlk is fixed for a particular hardware design; |
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255 * For the COCO GIME, it's always $3F. |
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256 KrnBlk SET $3F |
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257 |
2624 | 258 ENDC |
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259 ENDC |
2624 | 260 |