annotate defs/coco.d @ 3285:345ff5806dd7

Correct coco.d filename in shipped Defsfile files It seems that 8 years ago in commit 2624:b8c7b7fbf3c9 the coco defs were put into a new "coco.d" (from "systype"), and the various level*/<port>/defsfile were updated. However, the level*/<port>/defs/Defsfile (that are copied to the disk images under DEFS) were apparently wrongly updated.
author hpmachining <aur@hpminc.com>
date Thu, 18 Jun 2020 20:29:32 +0200
parents f248546159b7
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
2624
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1 IFNE COCO.D-1
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2 COCO.D SET 1
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3
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4 ********************************************************************
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5 * CoCoDefs - NitrOS-9 System Definitions for the Tandy Color Computer
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6 *
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7 * $Id$
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8 *
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9 * Edt/Rev YYYY/MM/DD Modified by
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10 * Comment
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11 * ------------------------------------------------------------------
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12 * 1998/10/13 Boisy G. Pitre
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13 * Added defs by Bruce Isted from his Eliminator archive.
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14 *
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15 * 1998/10/31 Boisy G. Pitre
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16 * Merged cc3global.defs into this file.
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17 *
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18 * 2002/04/30 Boisy G. Pitre
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19 * Merged Level One and Level Two sysdefs.
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20 *
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21 * 2002/06/22 Boisy G. Pitre
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22 * Removed PIA.U4 and PIA.U8, improved comments
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23 *
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24 * 2003/11/05 Robert Gault
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25 * Made changes in window globals and grfdrv memory to handle regW
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26 * in 6809 systems.
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27 *
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28 * 2003/11/30 Boisy G. Pitre
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29 * Statics now are prefaced with V. to identify them easier in source.
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30 *
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31 * 2004/07/18 Boisy G. Pitre
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32 * Moved CoCo 3 Window stuff into cc3iodefs
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33 *
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34 * 2012/02/24 Boisy G. Pitre
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35 * Consolidated all CoCo-specific defs files into here.
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36
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37 NAM CoCoDefs
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38 IFEQ Level-1
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39 TTL NitrOS-9 System Definitions for the Tandy Color Computer
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40 ELSE
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41 IFEQ Level-2
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42 TTL NitrOS-9 Level 2 System Type Definitions
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43 ELSE
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44 IFEQ Level-3
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45 TTL NitrOS-9 Level 3 System Type Definitions
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46 ENDC
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47 ENDC
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48 ENDC
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49
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50
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51 **********************
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52 * CPU Type Definitions
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53 *
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54 Color SET 1
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55 Color3 SET 2
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56 IFEQ Level-1
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57 CPUType SET Color
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58 ELSE
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59 CPUType SET Color3
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60 ENDC
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61
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62
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63 ******************************
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64 * Clock Speed Type Definitions
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65 *
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66 OneMHz EQU 1
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67 TwoMHz EQU 2
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68 IFEQ CPUType-Color
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69 CPUSpeed SET OneMHz
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70 ELSE
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71 CPUSpeed SET TwoMHz
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72 ENDC
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73
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74
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75 **********************************
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76 * Power Line Frequency Definitions
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77 *
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78 Hz50 EQU 1 Assemble clock for 50 hz power
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79 Hz60 EQU 2 Assemble clock for 60 hz power
2834
ca65720ee373 Fix support for 50Hz setting
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80 IFNDEF PwrLnFrq
2624
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81 PwrLnFrq SET Hz60 Set to Appropriate freq
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82 ENDC
2624
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83
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84
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85 **********************************
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86 * Ticks per second
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87 *
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88 IFNDEF TkPerSec
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89 IFEQ PwrLnFrq-Hz50
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90 TkPerSec SET 50
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91 ELSE
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92 TkPerSec SET 60
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93 ENDC
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94 ENDC
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95
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96
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97 ******************
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98 * ACIA type set up
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99 *
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100 ORG 1
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101 ACIA6850 RMB 1 MC6850 acia.
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102 ACIA6551 RMB 1 SY6551 acia.
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103 ACIA2661 RMB 1 SC2661 acia.
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104 ACIATYPE SET ACIA6551
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105
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106
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107 ****************************************
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108 * Special character Bit position equates
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109 *
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110 SHIFTBIT EQU %00000001
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111 CNTRLBIT EQU %00000010
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112 ALTERBIT EQU %00000100
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113 UPBIT EQU %00001000
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114 DOWNBIT EQU %00010000
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115 LEFTBIT EQU %00100000
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116 RIGHTBIT EQU %01000000
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117 SPACEBIT EQU %10000000
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118
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119
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120 ******************
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121 * Device addresses for miscellaneous hardware
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122 *
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123 A.AciaP SET $FF68 Aciapak Address
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124 A.ModP SET $FF6C ModPak Address
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125 DPort SET $FF40 Disk controller base address
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126 MPI.Slct SET $FF7F Multi-Pak slot select
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127 MPI.Slot SET $03 Multi-Pak default slot
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128 PIA0Base EQU $FF00
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129 PIA1Base EQU $FF20
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130
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131
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132 ******************
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133 * VDG Devices
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134 *
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135 A.TermV SET $FFC0 VDG Term
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136 A.V1 SET $FFC1 Possible additional VDG Devices
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137 A.V2 SET $FFC2
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138 A.V3 SET $FFC3
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139 A.V4 SET $FFC4
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140 A.V5 SET $FFC5
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141 A.V6 SET $FFC6
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142 A.V7 SET $FFC7
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143
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144
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145 IFEQ Level-1
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146
3180
1c75a05d3304 defs: Move boot track parameters into each port def file
Boisy Pitre <coco@toughmac.com>
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147 ********************************
1c75a05d3304 defs: Move boot track parameters into each port def file
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148 * Boot defs for NitrOS-9 Level 1
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149 *
1c75a05d3304 defs: Move boot track parameters into each port def file
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150 * These defs are not strictly for 'Boot', but are for booting the
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151 * system.
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152 *
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153 Bt.Start EQU $EE00 Start address of the boot track in memory
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154
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155 ELSE
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156
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157 ******************************************
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158 * Boot defs for NitrOS-9 Level 2 and above
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159 *
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160 * These defs are not strictly for 'Boot', but are for booting the
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161 * system.
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162 *
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163 Bt.Start SET $ED00 Start address of the boot track in memory
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164 Bt.Block EQU $3B Block to map in for the 'OS9BOOT' screen
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165 Bt.Flag EQU $8A34 Flag in Bt.Block to verify that it's unchanged
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166 Bt.Offst EQU 2 Offset into the screen where the current ptr is
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167
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168 ENDC
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169
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170 * On the CoCo, the boot track is all of track 34
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171
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172 Bt.Track EQU 34 Boot track
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173 Bt.Sec EQU 0 Start LSN of boot area on boot track
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174
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175
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176 Bt.Size EQU $1080 Maximum size of bootfile
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177
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178
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179 IFEQ Level-1
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180
2624
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181 *************************************************
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182 *
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183 * NitrOS-9 Level 1 Section
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184 *
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185 *************************************************
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186
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187 HW.Page SET $FF Device descriptor hardware page
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188
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189 ELSE
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190
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191 *************************************************
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192 *
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193 * NitrOS-9 Level 2 Section
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194 *
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195 *************************************************
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196
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197 ****************************************
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198 * Dynamic Address Translator Definitions
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199 *
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200 DAT.BlCt EQU 8 D.A.T. blocks/address space
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201 DAT.BlSz EQU (256/DAT.BlCt)*256 D.A.T. block size
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202 DAT.ImSz EQU DAT.BlCt*2 D.A.T. Image size
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203 DAT.Addr EQU -(DAT.BlSz/256) D.A.T. MSB Address bits
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204 DAT.Task EQU $FF91 Task Register address
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205 DAT.TkCt EQU 32 Number of DAT Tasks
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206 DAT.Regs EQU $FFA0 DAT Block Registers base address
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207 DAT.Free EQU $333E Free Block Number
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208 DAT.BlMx EQU $3F Maximum Block number
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209 DAT.BMSz EQU $40 Memory Block Map size
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210 DAT.WrPr EQU 0 no write protect
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211 DAT.WrEn EQU 0 no write enable
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212 SysTask EQU 0 Coco System Task number
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213 IOBlock EQU $3F
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214 ROMBlock EQU $3F
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215 IOAddr EQU $7F
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216 ROMCount EQU 1 number of blocks of ROM (High RAM Block)
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217 RAMCount EQU 1 initial blocks of RAM
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218 MoveBlks EQU DAT.BlCt-ROMCount-2 Block numbers used for copies
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219 BlockTyp EQU 1 chk only first bytes of RAM block
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220 ByteType EQU 2 chk entire block of RAM
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221 Limited EQU 1 chk only upper memory for ROM modules
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222 UnLimitd EQU 2 chk all NotRAM for modules
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223 * NOTE: this check assumes any NotRAM with a module will
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224 * always start with $87CD in first two bytes of block
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225 RAMCheck EQU BlockTyp chk only beg bytes of block
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226 ROMCheck EQU Limited chk only upper few blocks for ROM
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227 LastRAM EQU IOBlock maximum RAM block number
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228
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229 ***************************
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230 * Color Computer 3 Specific
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231 *
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232 MappedIO EQU true (Actually False but it works better this way)
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233
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234 ********************
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235 * Hardware addresses
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236 *
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237 GIMERegs EQU $FF00 Base address of GIME registers
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238 IrqEnR EQU $FF92 GIME IRQ enable/status register
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239 BordReg EQU $FF9A Border color register
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240 PalAdr EQU $FFB0 Palette registers
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241
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242 HW.Page SET $07 Device descriptor hardware page
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243
3200
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244 * KrnBlk defines the block number of the 8K RAM block that is mapped to
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245 * the top of CPU address space ($E000-$FFFF) for the system process, and
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diff changeset
246 * which holds the Kernel. The top 2 pages of this CPU address space ($FFE0-
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diff changeset
247 * $FFFF) has two special properties. Firstly, it contains the I/O space.
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248 * Secondly, the parts that contain RAM map are not affected by the DAT
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249 * mappings but, instead, *always* map that RAM to a fixed RAM block
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diff changeset
250 * (KrnBlk). When a user process is mapped in, and requests enough memory,
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diff changeset
251 * it will end up with its own block assigned for CPU address space $E000-
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252 * $FFFF but the top of the address space is unusable by the user process:
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253 * it still contains the I/O and the bit of RAM that's mapped to KrnBlk.
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diff changeset
254 * Usually, the value of KrnBlk is fixed for a particular hardware design;
f248546159b7 defs: Expand comments around KrnBlk
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diff changeset
255 * For the COCO GIME, it's always $3F.
3195
6eb2edad80d8 L2: Introduce symbol KrnBlk to define kernel block number
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diff changeset
256 KrnBlk SET $3F
6eb2edad80d8 L2: Introduce symbol KrnBlk to define kernel block number
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257
2624
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258 ENDC
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6eb2edad80d8 L2: Introduce symbol KrnBlk to define kernel block number
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259 ENDC
2624
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260