Mercurial > hg > Members > kono > nitros9-code
annotate level1/modules/sc6551dragon.asm @ 3036:42861a1dd59e
Low level driver update to CoCoSDC provided by Darren.
| author | David Ladd <drencor-xeen@users.sf.net> |
|---|---|
| date | Fri, 09 Jan 2015 12:32:56 -0600 |
| parents | d3b51489cb58 |
| children |
| rev | line source |
|---|---|
| 1966 | 1 * |
| 2 * Dragon 64/Alpha 6551 serial port driver | |
| 3 * | |
| 4 * Disassembled 2005/04/25 00:12:02 by Disasm v1.5 (C) 1988 by RML | |
| 5 * | |
| 6 * The Dragon 64 and Dragon Alpha have a hardware serial port driven | |
| 7 * by a Rockwell 6551, mapped from $FF04-$FF07. | |
|
240
7c673ea162ca
That's the lot. Devicedrivers and device descriptors from Dragon
roug
parents:
diff
changeset
|
8 * |
| 1966 | 9 * Communication between the read/write routines and the ACIA, is buffered |
| 10 * using a pair of ring buffers, when disassembling labels have been assigned | |
| 11 * so that bytes are placed into the Rx/Tx queue Tail, and removed from the | |
| 12 * head. When the queues become full the calling process is put to sleep | |
| 13 * while it awiaits Rx/Tx from the remote device. | |
| 14 * | |
| 15 * 2005-05-01, P.Harvey-Smith. | |
| 16 * Initial disassembly. | |
| 17 * | |
| 18 * 2005-10-24, P.Harvey-Smith. | |
| 19 * Code clean up/commenting. | |
|
240
7c673ea162ca
That's the lot. Devicedrivers and device descriptors from Dragon
roug
parents:
diff
changeset
|
20 * |
| 1966 | 21 |
| 2043 | 22 nam sc6551 |
| 1966 | 23 ttl os9 device driver |
| 24 | |
| 25 ifp1 | |
| 2042 | 26 use defsfile |
| 1966 | 27 endc |
| 28 | |
| 29 * Following definitions borrowed from sc6551.asm | |
| 30 | |
| 31 * Status bit definitions | |
| 32 Stat.IRQ equ %10000000 IRQ occurred | |
| 33 Stat.DSR equ %01000000 DSR level (clear = active) | |
| 34 Stat.DCD equ %00100000 DCD level (clear = active) | |
| 35 Stat.TxE equ %00010000 Tx data register Empty | |
| 36 Stat.RxF equ %00001000 Rx data register Full | |
| 37 Stat.Ovr equ %00000100 Rx data Overrun error | |
| 38 Stat.Frm equ %00000010 Rx data Framing error | |
| 39 Stat.Par equ %00000001 Rx data Parity error | |
| 40 | |
| 41 Stat.Err equ Stat.Ovr!Stat.Frm!Stat.Par Status error bits | |
| 42 Stat.Flp equ $00 all Status bits active when set | |
| 43 Stat.Msk equ Stat.IRQ!Stat.RxF active IRQs | |
| 44 | |
| 45 * Control bit definitions | |
| 46 Ctl.Stop equ %10000000 stop bits (set=two, clear=one) | |
| 47 Ctl.DBit equ %01100000 see data bit table below | |
| 48 Ctl.RxCS equ %00010000 Rx clock source (set=baud rate, clear=external) | |
| 49 Ctl.Baud equ %00001111 see baud rate table below | |
| 50 | |
| 51 * data bit table | |
| 52 DB.8 equ %00000000 eight data bits per character | |
| 53 DB.7 equ %00100000 seven data bits per character | |
| 54 DB.6 equ %01000000 six data bits per character | |
| 55 DB.5 equ %01100000 five data bits per character | |
| 56 | |
| 57 * baud rate table | |
| 58 org $00 | |
| 59 BR.ExClk rmb 1 16x external clock (not supported) | |
| 60 org $11 | |
| 61 BR.00050 rmb 1 50 baud (not supported) | |
| 62 BR.00075 rmb 1 75 baud (not supported) | |
| 63 BR.00110 rmb 1 109.92 baud | |
| 64 BR.00135 rmb 1 134.58 baud (not supported) | |
| 65 BR.00150 rmb 1 150 baud (not supported) | |
| 66 BR.00300 rmb 1 300 baud | |
| 67 BR.00600 rmb 1 600 baud | |
| 68 BR.01200 rmb 1 1200 baud | |
| 69 BR.01800 rmb 1 1800 baud (not supported) | |
| 70 BR.02400 rmb 1 2400 baud | |
| 71 BR.03600 rmb 1 3600 baud (not supported) | |
| 72 BR.04800 rmb 1 4800 baud | |
| 73 BR.07200 rmb 1 7200 baud (not supported) | |
| 74 BR.09600 rmb 1 9600 baud | |
| 75 BR.19200 rmb 1 19200 baud | |
|
240
7c673ea162ca
That's the lot. Devicedrivers and device descriptors from Dragon
roug
parents:
diff
changeset
|
76 |
| 1966 | 77 * Command bit definitions |
| 78 Cmd.Par equ %11100000 see parity table below | |
| 79 Cmd.Echo equ %00010000 local echo (set=activated) | |
| 80 Cmd.TIRB equ %00001100 see Tx IRQ/RTS/Break table below | |
| 81 Cmd.RxI equ %00000010 Rx IRQ (set=disabled) | |
| 82 Cmd.DTR equ %00000001 DTR output (set=enabled) | |
| 83 | |
| 84 * parity table | |
| 85 Par.None equ %00000000 | |
| 86 Par.Odd equ %00100000 | |
| 87 Par.Even equ %01100000 | |
| 88 Par.Mark equ %10100000 | |
| 89 Par.Spac equ %11100000 | |
|
240
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That's the lot. Devicedrivers and device descriptors from Dragon
roug
parents:
diff
changeset
|
90 |
| 1966 | 91 * Tx IRQ/RTS/Break table |
| 92 TIRB.Off equ %00000000 RTS & Tx IRQs disabled | |
| 93 TIRB.On equ %00000100 RTS & Tx IRQs enabled | |
| 94 TIRB.RTS equ %00001000 RTS enabled, Tx IRQs disabled | |
| 95 TIRB.Brk equ %00001100 RTS enabled, Tx IRQs disabled, Tx line Break | |
| 96 | |
| 97 * V.ERR bit definitions | |
| 98 DCDLstEr equ %00100000 DCD lost error | |
| 99 OvrFloEr equ %00000100 Rx data overrun or Rx buffer overflow error | |
| 100 FrmingEr equ %00000010 Rx data framing error | |
| 101 ParityEr equ %00000001 Rx data parity error | |
| 102 | |
| 103 * FloCtlRx bit definitions | |
| 104 FCRxSend equ %10000000 send flow control character | |
| 105 FCRxSent equ %00010000 Rx disabled due to XOFF sent | |
| 106 FCRxDTR equ %00000010 Rx disabled due to DTR | |
| 107 FCRxRTS equ %00000001 Rx disabled due to RTS | |
| 108 | |
| 109 * FloCtlTx bit definitions | |
| 110 FCTxXOff equ %10000000 due to XOFF received | |
| 111 FCTxBrk equ %00000010 due to currently transmitting Break | |
|
240
7c673ea162ca
That's the lot. Devicedrivers and device descriptors from Dragon
roug
parents:
diff
changeset
|
112 |
| 1966 | 113 * Wrk.Type bit definitions |
| 114 Parity equ %11100000 parity bits | |
| 115 MdmKill equ %00010000 modem kill option | |
| 116 RxSwFlow equ %00001000 Rx data software (XON/XOFF) flow control | |
| 117 TxSwFlow equ %00000100 Tx data software (XON/XOFF) flow control | |
| 118 RTSFlow equ %00000010 CTS/RTS hardware flow control | |
| 119 DSRFlow equ %00000001 DSR/DTR hardware flow control | |
| 120 | |
| 121 * Wrk.Baud bit definitions | |
| 122 StopBits equ %10000000 number of stop bits code | |
| 123 WordLen equ %01100000 word length code | |
| 124 BaudRate equ %00001111 baud rate code | |
| 125 | |
| 126 * Wrk.XTyp bit definitions | |
| 127 SwpDCDSR equ %10000000 swap DCD+DSR bits (valid for 6551 only) | |
| 128 ForceDTR equ %01000000 don't drop DTR in term routine | |
| 129 RxBufPag equ %00001111 input buffer page count | |
| 130 | |
| 131 * End of borrowed stuff :) | |
| 132 | |
| 133 tylg set Drivr+Objct | |
| 134 atrv set ReEnt+rev | |
| 135 rev set $01 | |
| 136 mod eom,name,tylg,atrv,start,size | |
| 1287 | 137 |
| 1966 | 138 RxQueueTailOffset rmb 1 ; Tail of Rx queue, Rx inturrupt inserts here |
| 139 RxQueueHeadOffset rmb 1 ; Head of Rx queue, read call fetches from here | |
| 140 u001F rmb 1 | |
| 141 TxQueueTailOffset rmb 1 ; Tail of Tx queue, write call inserts here | |
| 142 TxQueueHeadOffset rmb 1 ; Head of Tx queue, Tx inturrupt fetches here | |
| 143 u0022 rmb 1 | |
| 144 u0023 rmb 1 ; something to do with XON/XOFF | |
| 145 u0024 rmb 2 | |
| 146 SavedDSRDCD rmb 1 ; Saved DSR and DCD ststus | |
| 147 RxQueue rmb 80 ; Rx Queue | |
| 148 RxQueueLen EQU *-RxQueue ; Rx queue length | |
| 149 | |
| 150 TxQueue rmb 140 ; Tx Queue | |
| 151 TxQueueLen EQU *-TxQueue ; Tx Queue length | |
| 1287 | 152 |
| 1966 | 153 size equ . |
| 154 | |
| 155 fcb $03 | |
| 156 | |
| 157 name equ * | |
| 2043 | 158 fcs /sc6551/ |
| 1966 | 159 fcb $04 |
| 160 | |
| 161 start equ * | |
| 1287 | 162 |
| 1966 | 163 lbra Init |
| 164 lbra Read | |
| 165 lbra Write | |
| 166 lbra GetSta | |
| 167 lbra SetSta | |
| 168 lbra Term | |
| 169 | |
| 170 IRQPkt | |
| 171 FCB $00 ; Normal bits (flip byte) | |
| 172 FCB $80 ; Bit 1 is interrupt request flag (Mask byte) | |
| 173 FCB $0A ; Priority byte | |
| 174 | |
| 175 | |
| 176 * Init | |
| 177 * | |
| 178 * Entry: | |
| 179 * Y = address of device descriptor | |
| 180 * U = address of device memory area | |
| 181 * | |
| 182 * Exit: | |
| 183 * CC = carry set on error | |
| 184 * B = error code | |
| 185 * | |
| 186 | |
| 187 Init LDX V.PORT,U ; 1,U Get port address $FF04 | |
| 188 stb AciaStat,x ; Write to status reg, this resets ACIA | |
| 189 ldb #$02 | |
| 190 stb <u0022,u | |
| 191 ldd <IT.PAR,y ; Get parity & baud rate <$26,y | |
| 192 | |
| 193 andb #$0F | |
| 194 leax <BaudRateTable,pcr ; Calculate baud rate values for Acia | |
| 195 ldb b,x | |
| 196 | |
| 197 anda #$F0 | |
| 198 sta V.TYPE,u ; Save parity bits for later use | |
| 199 ldx V.PORT,u ; Get port address $FF04 | |
| 200 std AciaCmd,x ; Setup Command (A), Control (B,Baud rates). | |
| 201 lda ,x | |
| 202 lda ,x | |
| 203 tst AciaStat,x ; Get status | |
| 204 lbmi ErrorExit ; Error if int occoured | |
| 205 | |
| 206 clra ; Init some static storage | |
| 207 clrb | |
| 208 std <RxQueueTailOffset,u ; Init Rx queue | |
| 209 std <TxQueueTailOffset,u ; Init Tx queue | |
| 210 sta <u0023,u | |
| 211 sta <u001F,u | |
| 212 std <u0024,u | |
| 213 | |
| 214 ldd V.PORT,u ; Get port address $FF04 | |
| 215 addd #$0001 ; Setup V$IRQ on status reg changes | |
| 216 leax >IRQPkt,pcr ; Point to packet | |
| 217 leay >IRQService,pcr ; Point to handler | |
| 218 os9 F$IRQ ; Install it ! | |
| 219 bcs InitExit ; Error : Exit | |
| 220 | |
| 221 ldx V.PORT,u ; Get port address $FF04 | |
| 222 ldb V.TYPE,u ; Get device parity settings | |
| 223 orb #Cmd.DTR ; SET DTR, flag us as ready | |
| 224 stb AciaCmd,x | |
| 225 clrb ; Flag no error | |
| 226 InitExit | |
| 227 rts | |
| 228 | |
| 229 ; | |
| 230 ; Baud rate table, all baud rates use external clock. | |
| 231 ; | |
| 232 | |
| 233 BaudRateTable | |
| 234 fcb Ctl.RxCS+BR.00110 | |
| 235 fcb Ctl.RxCS+BR.00300 | |
| 236 fcb Ctl.RxCS+BR.00600 | |
| 237 fcb Ctl.RxCS+BR.01200 | |
| 238 fcb Ctl.RxCS+BR.02400 | |
| 239 fcb Ctl.RxCS+BR.04800 | |
| 240 fcb Ctl.RxCS+BR.09600 | |
| 241 fcb Ctl.RxCS+BR.19200 | |
| 1287 | 242 |
| 1966 | 243 PutProcToSleep |
| 244 bsr DoPutProcToSleep | |
| 245 | |
| 246 * | |
| 247 * Input U = Address of device static data storage | |
| 248 * Y = Address of path descriptor module | |
| 249 * | |
| 250 * Output | |
| 251 * A = Character read | |
| 252 * CC = carry set on error, clear on none | |
| 253 * B = error code if CC.C set. | |
| 254 * | |
| 255 | |
| 256 | |
| 257 Read lda <u0023,u | |
| 258 ble L00A1 | |
| 259 | |
| 260 ldb <u001F,u | |
| 261 cmpb #$0A | |
| 262 bhi L00A1 | |
| 263 | |
| 264 ldb V.XON,u | |
| 265 orb #$80 | |
| 266 stb <u0023,u | |
| 267 | |
| 268 ldb V.TYPE,u ; Get prity settings | |
| 269 orb #TIRB.On+Cmd.DTR ; Enable tranmitter inturrupt & DTR ($05) | |
| 270 ldx V.PORT,u ; Get port address $FF04 | |
| 271 stb AciaCmd,x ; Write to ACIA | |
| 272 | |
| 273 L00A1 tst <u0024,u | |
| 274 bne ErrorExit | |
| 275 | |
| 276 ldb <RxQueueHeadOffset,u ; Get queue head ptr | |
| 277 leax <RxQueue,u ; Get Rx Queue address | |
| 1287 | 278 |
| 1966 | 279 orcc #$50 ; Disable Inturrupts |
| 280 cmpb <RxQueueTailOffset,u ; Is Head=Tail, and therefore queue empty ? | |
| 281 beq PutProcToSleep ; Yes : sleep and await input from remote device | |
| 282 | |
| 283 abx ; Calculate pos in queue for next char | |
| 284 lda ,x ; Get byte from read queue | |
| 285 dec <u001F,u | |
| 286 incb | |
| 287 cmpb #RxQueueLen-1 ; Reached end of queue area ? | |
| 288 bls L00BF ; no : continue | |
| 289 | |
| 290 clrb ; Wrap tail pointer to the beginning of queue space | |
| 291 L00BF stb <RxQueueHeadOffset,u ; save new queue pointer | |
| 292 clrb | |
| 293 ldb V.ERR,u | |
| 294 beq L00CF ; No error : exit | |
| 295 | |
| 296 stb <$3A,y | |
| 297 clr V.ERR,u | |
| 298 comb ; Flag and return error | |
| 299 ldb #$F4 | |
| 300 L00CF andcc #$AF ; Enable inturrupts | |
| 301 rts | |
| 302 | |
| 303 ErrorExit | |
| 304 comb ; Flag error & return | |
| 305 ldb #$F6 | |
| 306 rts | |
| 307 | |
| 308 ; | |
| 309 ; Put calling process to sleep while we await input or output from remote device. | |
| 310 ; | |
| 311 | |
| 312 DoPutProcToSleep | |
| 313 pshs x,b,a | |
| 314 lda V.BUSY,u ; Get busy process | |
| 315 sta V.WAKE,u ; Store in proc to wake | |
| 316 andcc #$AF ; Enable inturrupts | |
| 317 ldx #$0000 ; Sleep indefinatly | |
| 318 os9 F$Sleep ; Put caller to sleep | |
| 319 | |
| 320 ldx <D.Proc ; Get current proces descriptor addr | |
| 321 ldb <P$Signal,x ; Get signal code of proc | |
| 322 beq L00EF | |
| 323 | |
| 324 cmpb #$03 | |
| 325 bls L00F8 | |
| 1287 | 326 |
| 1966 | 327 L00EF clra |
| 328 lda P$State,x ; Get process state | |
| 329 bita #Condem ; Process condemed ? (being killed ?) | |
| 330 bne L00F8 ; yes : error, exit | |
| 331 | |
| 332 puls pc,x,b,a ; Return | |
| 333 | |
| 334 L00F8 leas $06,s | |
| 335 coma | |
| 336 rts | |
| 337 | |
| 338 L00FC bsr DoPutProcToSleep | |
| 339 | |
| 340 * | |
| 341 * Input U = Address of device static data storage | |
| 342 * Y = Address of path descriptor module | |
| 343 * A = Character to write | |
| 344 * | |
| 345 * Output | |
| 346 * CC = carry set on error, clear on none | |
| 347 * B = error code if CC.C set. | |
| 348 * | |
| 349 | |
| 350 Write leax <TxQueue,u ; Get pointer to transmit queue | |
| 351 ldb <TxQueueTailOffset,u ; Get offset of end of TX queue | |
| 352 abx ; Calculate next free queue slot | |
| 353 sta ,x ; Put byte to transmit in queue | |
| 354 incb ; Increment queue tail ptr | |
| 355 cmpb #TxQueueLen-1 ; End of Queue area ? | |
| 356 bls L010D ; no, continue | |
| 357 clrb ; Point at begining of queue area | |
| 358 | |
| 359 L010D orcc #$50 ; Disable inturrupts | |
| 360 cmpb <TxQueueHeadOffset,u ; is Head=Tail therefore queue full ? | |
| 361 beq L00FC ; Yes : sleep process until room in queue | |
| 362 | |
| 363 stb <TxQueueTailOffset,u ; Re-save tail pointer | |
| 364 lda <u0022,u | |
| 365 beq L012B | |
| 366 | |
| 367 anda #$FD | |
| 368 sta <u0022,u | |
| 369 bne L012B | |
| 370 | |
| 371 lda V.TYPE,u ; Get parity bits | |
| 372 ora #TIRB.On+Cmd.DTR ; Enable tranmitter inturrupt & DTR ($05) | |
| 373 ldx V.PORT,u ; Get port address $FF04 | |
| 374 sta AciaCmd,x ; Write to ACIA | |
| 375 | |
| 376 L012B andcc #$AF ; Enable Inturrupts | |
| 377 L012D clrb ; Flag no error | |
| 378 rts | |
| 379 | |
| 380 * | |
| 381 * Input U = Address of device static data storage | |
| 382 * Y = Address of path descriptor module | |
| 383 * A = Status code | |
| 384 * | |
| 385 * Output | |
| 386 * Depends on status code. | |
| 387 * | |
| 388 | |
| 389 GetSta cmpa #SS.Ready ; Device ready ? ($01) | |
| 390 bne L013E | |
| 391 | |
| 392 ldb <u001F,u | |
| 393 beq ErrorExit | |
| 394 | |
| 395 ldx $06,y | |
| 396 stb $02,x | |
| 397 L013C clrb | |
| 398 rts | |
| 399 | |
| 400 L013E cmpa #SS.EOF ; EOF ? ($06) | |
| 401 beq L012D | |
| 402 | |
| 403 L0142 comb ; Flag error | |
| 404 ldb #$D0 | |
| 405 rts | |
| 406 | |
| 407 * | |
| 408 * Input U = Address of device static data storage | |
| 409 * Y = Address of path descriptor module | |
| 410 * A = Status code | |
| 411 * | |
| 412 * Output | |
| 413 * Depends on status code. | |
| 414 * | |
| 415 | |
| 416 SetSta cmpa #SS.SSig ; Send signal on data ready ? ($1A) | |
| 417 bne L0161 | |
| 418 | |
| 419 lda PD.CPR,y ; Get caller's process id | |
| 420 ldx PD.RGS,y ; Get caller's Regs | |
| 421 ldb $05,x ; Get lower half of X ???? | |
| 422 | |
| 423 orcc #$50 ; Disable inturrupts | |
| 424 tst <u001F,u | |
| 425 bne L015C | |
| 426 | |
| 427 std <u0024,u | |
| 428 bra L012B | |
| 429 | |
| 430 L015C andcc #$AF | |
| 431 lbra L01F8 | |
| 432 | |
| 433 L0161 cmpa #SS.Relea ; Release device ? ($1B) | |
| 434 bne L0142 | |
| 435 | |
| 436 lda PD.CPR,y ; Get calling process ID | |
| 437 cmpa <u0024,u ; Same process ? | |
| 438 bne L013C ; no ! | |
| 439 | |
| 440 clr <u0024,u ; Yes : release | |
| 441 rts | |
| 442 | |
| 443 L0170 lbsr DoPutProcToSleep | |
| 444 | |
| 445 * | |
| 446 * Input U = Address of device static data storage | |
| 447 * | |
| 448 * Output | |
| 449 * CC = carry set on error, clear on none | |
| 450 * B = error code if CC.C set. | |
| 451 * | |
| 452 | |
| 453 Term ldx <D.Proc ; Get current process descriptor addr | |
| 454 lda P$ID,x ; Get process ID | |
| 455 sta V.BUSY,u ; Save it in busy and last processs | |
| 456 sta V.LPRC,u | |
| 457 | |
| 458 ldb <TxQueueTailOffset,u ; Check we have sent all bytes ? | |
| 459 orcc #$50 | |
| 460 cmpb <TxQueueHeadOffset,u | |
| 461 bne L0170 ; Still bytes left to send, wait to send them | |
| 462 | |
| 463 lda V.TYPE,u ; Get Parity settings | |
| 464 ldx V.PORT,u ; Get port address $FF04 | |
| 465 sta AciaCmd,x ; Set parity in ACIA | |
| 466 andcc #$AF ; Enable inturrupts | |
| 467 | |
| 468 ldx #$0000 ; Remove IRQ handler | |
| 469 os9 F$IRQ | |
| 470 rts | |
| 471 | |
| 472 * | |
| 473 * F$IRQ handler, | |
| 474 * | |
| 475 * Input : | |
| 476 * A = Status byte XOR flip | |
| 477 * U = our data area | |
| 478 * | |
| 479 * In this case, since flip byte is zero, and any value XOR zero | |
| 480 * remains uncahanged, A contains the contents of the ACIA status | |
| 481 * register ($FF05) | |
| 482 * | |
| 483 | |
| 484 IRQService | |
| 485 ldx V.PORT,u ; Get port address $FF04 | |
| 486 tfr a,b ; Take a copy of status | |
| 487 andb #Stat.DSR+Stat.DCD ; Mask all but DSR & DCD ($60) | |
| 488 cmpb <SavedDSRDCD,u ; Compare to saved | |
| 489 beq L01AB ; not changed, check other bits | |
| 490 | |
| 491 stb <SavedDSRDCD,u ; Save DSR & DCD values | |
| 492 bitb #$60 ; Was either set ??? | |
| 493 lbne L02AE ; yes | |
| 494 lbra L029C | |
| 1287 | 495 |
| 1966 | 496 L01AB bita #Stat.RxF ; Rx register full ? ($08) |
| 497 bne L01FD ; yes | |
| 498 | |
| 499 lda <u0023,u | |
| 500 bpl L01C4 | |
| 501 | |
| 502 anda #$7F | |
| 503 sta ,x | |
| 504 eora V.XON,u | |
| 505 sta <u0023,u | |
| 506 lda <u0022,u | |
| 507 bne L01EA | |
| 508 | |
| 509 clrb | |
| 510 rts | |
| 511 | |
| 512 L01C4 leay <TxQueue,u ; Point to transmit queue | |
| 513 ldb <TxQueueHeadOffset,u ; Check that there are bytes to transmit | |
| 514 cmpb <TxQueueTailOffset,u | |
| 515 beq L01E2 ; no : skip | |
| 516 | |
| 517 clra | |
| 518 lda d,y ; Get byte to transmit | |
| 519 incb ; Increment head offset ptr | |
| 520 cmpb #TxQueueLen-1 ; Head at end of Queue area ? | |
| 521 bls L01D8 | |
| 522 | |
| 523 clrb ; Yes : point it at beginning | |
| 524 L01D8 stb <TxQueueHeadOffset,u ; Save it | |
| 525 sta AciaData,x ; Transmit byte | |
| 526 cmpb <TxQueueTailOffset,u ; Head=Tail therefore Tx queue empty ? | |
| 527 bne L01F0 ; no : skip ahead | |
| 528 | |
| 529 L01E2 lda <u0022,u | |
| 530 ora #$02 | |
| 531 sta <u0022,u | |
| 532 | |
| 533 L01EA ldb V.TYPE,u ; Get parity settings | |
| 534 orb #Cmd.DTR ; Enable DTR, ready | |
| 535 stb AciaCmd,x ; Write to ACIA | |
| 536 | |
| 537 L01F0 ldb #S$Wake ; Wake up calling process | |
| 538 lda V.WAKE,u ; Get proc ID to wake | |
| 539 L01F4 beq L01FB | |
| 540 | |
| 541 clr V.WAKE,u ; Clear saved wake proc ID | |
| 542 L01F8 os9 F$Send ; send wakeup signal | |
| 543 L01FB clrb ; Flag no error | |
| 544 rts | |
| 545 | |
| 546 L01FD bita #Stat.Par+Stat.Frm+Stat.Ovr ; Check for Parity/Framing/Overrun errors ($07) | |
| 547 beq L0213 ; No Error detected, do read | |
| 548 | |
| 549 tfr a,b ; Copy status | |
| 550 tst ,x | |
| 551 anda #$07 | |
| 552 ora V.ERR,u | |
| 553 sta V.ERR,u | |
| 554 lda $02,x | |
| 555 sta $01,x | |
| 556 sta $02,x | |
| 557 bra L01FB | |
| 558 | |
| 559 L0213 lda ,x ; Read byte from ACIA | |
| 560 beq L022E ; zero, branch ahead | |
| 561 | |
| 562 cmpa V.INTR,u ; Inturrupt char ? | |
| 563 beq L028B | |
| 564 | |
| 565 cmpa V.QUIT,u ; Quit char ? | |
| 566 beq L028F | |
| 567 | |
| 568 cmpa V.PCHR,u ; Pause char ? | |
| 569 beq L0283 | |
| 570 | |
| 571 cmpa V.XON,u ; Xon char ? | |
| 572 beq L029C | |
| 573 | |
| 574 cmpa <V.XOFF,u ; Xoff char ? | |
| 575 lbeq L02AE | |
| 576 | |
| 577 ; | |
| 578 ; If we reach here, char is nothing special, so just put it in queue | |
| 579 ; | |
| 1287 | 580 |
| 1966 | 581 L022E leax <RxQueue,u ; Point to receive queue |
| 582 ldb <RxQueueTailOffset,u ; Get tail offset | |
| 583 abx ; Calculate address | |
| 584 sta ,x ; Put char in queue | |
| 585 incb ; increment tail ptr | |
| 586 cmpb #RxQueueLen-1 ; End of queue area ? | |
| 587 bls L023D ; no : continue | |
| 588 | |
| 589 clrb ; point to begining of Rx queue area | |
| 590 L023D cmpb <RxQueueHeadOffset,u ; Same as head of queue ? | |
| 591 bne L024A ; no : | |
| 592 | |
| 593 ldb #$04 | |
| 594 orb V.ERR,u ; accumulated errors | |
| 595 stb V.ERR,u | |
| 596 bra L01F0 | |
| 597 | |
| 598 L024A stb <RxQueueTailOffset,u ; Save tail ptr | |
| 599 inc <u001F,u | |
| 600 tst <u0024,u | |
| 601 beq L025D | |
| 602 | |
| 603 ldd <u0024,u | |
| 604 clr <u0024,u | |
| 605 bra L01F8 | |
| 606 | |
| 607 L025D lda <V.XOFF,u | |
| 608 beq L01F0 | |
| 609 | |
| 610 ldb <u001F,u | |
| 611 cmpb #$46 | |
| 612 bcs L01F0 | |
| 613 | |
| 614 ldb <u0023,u | |
| 615 bne L01F0 | |
| 616 | |
| 617 anda #$7F | |
| 618 sta <V.XOFF,u | |
| 619 ora #$80 | |
| 620 sta <u0023,u | |
| 621 | |
| 622 ldb V.TYPE,u ; Get parity settings | |
| 623 orb #TIRB.On+Cmd.DTR ; Enable tranmitter inturrupt & DTR ($05) | |
| 624 ldx V.PORT,u ; Get port address $FF04 | |
| 625 stb AciaCmd,x ; Write to acia | |
| 626 | |
| 627 lbra L01F0 | |
| 628 L0283 ldx V.DEV2,u | |
| 629 beq L022E | |
| 630 | |
| 631 sta $08,x | |
| 632 bra L022E | |
| 633 | |
| 634 L028B ldb #$03 | |
| 635 bra L0291 | |
| 636 | |
| 637 L028F ldb #$02 | |
| 638 L0291 pshs a | |
| 639 | |
| 640 lda V.LPRC,u ; Get last active proc ID | |
| 641 lbsr L01F4 ; Wake process | |
| 642 puls a | |
| 643 bra L022E | |
| 644 | |
| 645 L029C lda <u0022,u | |
| 646 anda #$FE | |
| 647 sta <u0022,u | |
| 648 bne L02AC | |
| 649 | |
| 650 lda V.TYPE,u ; Get parity settings | |
| 651 ora #TIRB.On+Cmd.DTR ; Enable tranmitter inturrupt & DTR ($05) | |
| 652 sta AciaCmd,x ; Write to ACIA | |
| 653 L02AC clrb ; Flag no error | |
| 654 rts | |
| 655 | |
| 656 L02AE lda <u0022,u | |
| 657 bne L02B9 | |
| 658 | |
| 659 ldb V.TYPE,u ; Get parity settings | |
| 660 orb #Cmd.DTR ; Enable DTR | |
| 661 stb AciaCmd,x ; Write to ACIA | |
| 662 | |
| 663 L02B9 ora #$01 | |
| 664 sta <u0022,u | |
| 665 clrb | |
| 666 rts | |
| 667 | |
| 668 emod | |
| 669 eom equ * | |
| 670 end |