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2624
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1 IFNE DRAGON.D-1
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2 DRAGON.D set 1
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3
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4 ********************************************************************
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5 * DgnDefs - Dragon I/O Definitions
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6 *
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7 * $Id$
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8 *
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9 * Edt/Rev YYYY/MM/DD Modified by
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10 * Comment
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11 * ------------------------------------------------------------------
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12 * 2004/11/16 P.Harvey-Smith.
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13 * Fixed the stupid error I made in the defines below that made all the
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14 * non DPxxxxx defines equal to FF00 !!!
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15 *
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16 * 2005/04/14 P.Harvey-Smith
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17 * Added non DP defines for ACIA on Dragon 64/Alpha
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18 *
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19 * 2005/04/21 P.Harvey-Smith
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20 * Fixed errors in defines for WD2797 non-DP registers.
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21 *
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22
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23 nam DgnDefs
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24 ttl Dragon I/O Definitions
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25
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26 *************************************************
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27 *
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28 * NitrOS-9 Level 1 Section
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29 *
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30 *************************************************
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31
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32 HW.Page SET $FF Device descriptor hardware page
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33
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34 **********************************
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35 * Power Line Frequency Definitions
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36 *
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37 Hz50 EQU 1 Assemble clock for 50 hz power
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38 Hz60 EQU 2 Assemble clock for 60 hz power
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39 PwrLnFrq SET Hz60 Set to Appropriate freq
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40
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41
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42 **********************************
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43 * Ticks per second
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44 *
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45 IFEQ PwrLnFrq-Hz50
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46 TkPerSec SET 50
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47 ELSE
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48 TkPerSec SET 60
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49 ENDC
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50
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51
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52 ****************************************
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53 * Special character Bit position equates
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54 *
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55 SHIFTBIT EQU %00000001
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56 CNTRLBIT EQU %00000010
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57 ALTERBIT EQU %00000100
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58 UPBIT EQU %00001000
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59 DOWNBIT EQU %00010000
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60 LEFTBIT EQU %00100000
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61 RIGHTBIT EQU %01000000
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62 SPACEBIT EQU %10000000
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63
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64 ********************
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65 * VTIO Static Memory
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66 *
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67 * Definitions for ports on Dragon 32/64/Alpha.
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68 *
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69 *
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70 IO equ $ff00 IO page on Dragon
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71
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72 *
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73 * Most of these symbols will be defined twice, as some
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74 * of the Dragon code, sets DP=$FF, and uses direct page
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75 * addressing to access the io ports, whilst some of it
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76 * uses absolute addressing.
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77 * The versions starting DP must be used with DP=$FF.
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78 *
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79
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80 * PIA 0 and 1 standard on all Dragons.
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81 DPPIA0DA EQU $00 Side A Data/DDR
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82 PIA0Base EQU DPPIA0DA
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83 DPPIA0CRA EQU $01 Side A Control.
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84 DPPIA0DB EQU $02 Side B Data/DDR
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85 DPPIA0CRB EQU $03 Side B Control.
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86
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87 PIA0DA EQU DPPIA0DA+IO Side A Data/DDR
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88 PIA0CRA EQU DPPIA0CRA+IO Side A Control.
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89 PIA0DB EQU DPPIA0DB+IO Side A Data/DDR
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90 PIA0CRB EQU DPPIA0CRB+IO Side A Control.
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91
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92 DPPIA1DA EQU $20 Side A Data/DDR
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93 PIA1Base EQU DPPIA1DA
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94 DPPIA1CRA EQU $21 Side A Control.
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95 DPPIA1DB EQU $22 Side B Data/DDR
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96 DPPIA1CRB EQU $23 Side B Control.
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97
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98 PIA1DA EQU DPPIA1DA+IO Side A Data/DDR
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99 PIA1CRA EQU DPPIA1CRA+IO Side A Control.
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100 PIA1DB EQU DPPIA1DB+IO Side A Data/DDR
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101 PIA1CRB EQU DPPIA1CRB+IO Side A Control.
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102
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103 * Dragon Alpha has a third PIA at $FF24.
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104 DPPIA2DA EQU $24 Side A Data/DDR
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105 DPPIA2CRA EQU $25 Side A Control.
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106 DPPIA2DB EQU $26 Side B Data/DDR
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107 DPPIA2CRB EQU $27 Side B Control.
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108
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109 PIA2DA EQU DPPIA2DA+IO Side A Data/DDR
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110 PIA2CRA EQU DPPIA2CRA+IO Side A Control.
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111 PIA2DB EQU DPPIA2DB+IO Side A Data/DDR
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112 PIA2CRB EQU DPPIA2CRB+IO Side A Control.
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113
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114 * WD2797 Floppy disk controler, used in Alpha Note registers in reverse order !
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115 DPCmdRegA EQU $2F command/status
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116 DPTrkRegA EQU $2E Track register
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117 DPSecRegA EQU $2D Sector register
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118 DPDataRegA EQU $2C Data register
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119
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120 CmdRegA EQU DPCMDREGA+IO command/status
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121 TrkRegA EQU DPTRKREGA+IO Track register
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122 SecRegA EQU DPSECREGA+IO Sector register
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123 DataRegA EQU DPDATAREGA+IO Data register
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124
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2670
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125 DPort SET DataRegA Disk controller base address
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2624
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126
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127 * Constants for Alpha AY-8912 sound chip, which is used to control
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128 * Drive select and motor on the Alpha
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129 AYIOREG EQU $0E AY-8912, IO Register number.
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130 AYIdle EQU $00 Make AY Idle.
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131 AYWriteReg EQU $01 Write AY Register
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132 AYReadReg EQU $02 Read AY Register
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133 AYREGLatch EQU $03 Latch register into AY
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134
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135 DSMask EQU $03 Drive select mask.
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136 MotorMask EQU $04 Motor enable mask
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137 DDENMask EQU $08 DDEN Mask
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138 ENPMask EQU $10 Enable Precomp mask
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139 NMIMask EQU $20 NMI enable Mask
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140
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141 * Dragon 64/Alpha Serial port.
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142 DPAciaData EQU $04 ACIA Rx/Tx Register
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143 DPAciaStat EQU $05 ACIA status register
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144 DPAciaCmd EQU $06 ACIA command register
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145 DPAciaCtrl EQU $07 ACIA control register
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146
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147 AciaData EQU DPAciaData+IO ACIA Rx/Tx Register
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148 AciaStat EQU DPAciaStat+IO ACIA status register
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149 AciaCmd EQU DPAciaCmd+IO ACIA command register
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150 AciaCtrl EQU DPAciaCtrl+IO ACIA control register
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151
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152 * DragonDos Cartrage IO for WD2797
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153 * WD2797 Floppy disk controler, used in DragonDos.
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154 DPCmdRegD EQU $40 command/status
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155 DPTrkRegD EQU $41 Track register
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156 DPSecRegD EQU $42 Sector register
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157 DPDataRegD EQU $43 Data register
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158
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159 CmdRegD EQU DPCMDREGD+IO command/status
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160 TrkRegD EQU DPTRKREGD+IO Track register
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161 SecRegD EQU DPSECREGD+IO Sector register
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162 DataRegD EQU DPDATAREGD+IO Data register
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163
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164 DPDSKCTL EQU $48 Disk DS/motor control reg
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165 DSKCTL EQU DPDSKCTL+IO
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166
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167 * Disk IO bitmasks (DragonDos).
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168 NMIEnD EQU %00100000
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169 WPCEnD EQU %00010000
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170 SDensEnD EQU %00001000
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171 MotorOnD EQU %00000100
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172 Drive0D EQU %00000000
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173 Drive1D EQU %00000001
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174 Drive2D EQU %00000010
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175 Drive3D EQU %00000011
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176 DDosDriveMask EQU %00000011 Mask out all non drive select bits
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177 DDosCtrlMask EQU %11111100 Mask in all non drive select bits
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178
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179
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180 * Disk IO bitmasks (Dragon Alpha).
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181 PIANMIEnA EQU %00001000 PIA2, CA2, used to enable/disable NMI
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182 PIANMIDisA EQU %11110111 Bitmask to force CA2 off, and disable NMI
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183
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184 NMIEnA EQU %10000000 Flag to enable disable NMI, passed to AlphaDskCtl
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185 WPCEnA EQU %01000000 According to circuit trace by R.Harding.
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186 SDensEnA EQU %00100000 DDen, from circuit trace on R.Harding's machine.
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187 MotorOnA EQU %00010000
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188 Drive0A EQU %00000001
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189 Drive1A EQU %00000010
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190 Drive2A EQU %00000100
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191 Drive3A EQU %00001000
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192 AlphaDrvMask EQU %00001111 Mask out all non drive select bits
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193 AlphaCtrlMask EQU %11110000 Mask in all non drive select bits
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194
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195 Mask58 EQU %01111111 And mask to make sure 5.25" clock selected by WD2797
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196
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197 NMICA2En EQU $3C Value for PIA CRA to enable NMI
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198 NMICA2Dis EQU $34 Value for PIA CRA to disable NMI
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199
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200 * Disk Commands
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201 FrcInt EQU %11010000
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202 ReadCmnd EQU %10001000
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203 RestCmnd EQU %00000000
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204 SeekCmnd EQU %00010000
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205 StpICmnd EQU %01000000
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206 WritCmnd EQU %10101000
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207 WtTkCmnd EQU %11110000
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208 Sid2Sel EQU %00000010
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209
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210 * Disk Status Bits
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211 BusyMask EQU %00000001
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212 LostMask EQU %00000100
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213 ErrMask EQU %11111000
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214 CRCMask EQU %00001000
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215 RNFMask EQU %00010000
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216 RTypMask EQU %00100000
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217 WPMask EQU %01000000
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218 NotRMask EQU %10000000
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219
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220 DensMask EQU %00000001
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221 T80Mask EQU %00000010
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222
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223 ENDC
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